Sunday 11 June 2017

layout - Clock Divider IC, Using Series or Parallel Termination


I am using a 542MILF in a design.


The datasheet says the output impedance is 20Ω (not low output impedance)



Would I have to use series termination e.i. 30Ω resistor followed by 50Ω transmission line because this IC has a fairly high output impedance?


If the clock signal is going to a HiZ input could I still use parallel termination instead?


Thanks




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