multiplier - Do we have binary dividers circuit in CISC computers?

Just like we have binary multipler circuit in cisc computer so do we have binary divider circuit in cisc computer? Or it is just like we use subtractor multiple time instead of having a real divider circuit? (Just like risc don't have multiplier circuit so it use adders circuit instead of multiplier circuit).

Answer

There are arithmetic binary multipliers and then there are clock frequency multipliers.

I'll discuss some of it only, you decide what you want.

For how arithmetic multipliers and dividers work, read here

Frequency multipliers work in several ways;

1) by using a PLL to divide down to the mixer frequency. So the multiplier is actually a divider. (binary, BCD or fraction N types)
2) by using delay gates with cascaded stages and a faster XOR gate to detect the transitions. (used by 700MHz RISC CPU's)
3) diode x2 RF multiplier.
4) harmonic pulse injected BP tuned resonator

CISC processors are more efficient at utilizing memory bandwidth with variable length and more complex instructions, so a CISC like the 8086 but they use a PLL to multiply the FSB clock using binary dividers

So it is an Apples and Oranges question.

A RISC may use an XOR gate delay multiplier for simplicity, while an Intel or AMD CISC uses a divider to PLL a faster internal VCO clock.