I have a USB powered device with multiple IC's. From what I've read it's standard practice to use a combination of multiple range capacitors for decoupling each individual IC, with the smallest being as close as possible and larger capacitors not too far away.
However, I'm running into a dilemma:
According to this source, the maximum allowed decoupling capacitance for a USB device is 10uF. With several IC's all having a combination of 0.1uF and 2.2uF/4.7uF decoupling capacitors, I'm easily exceeding this limit because they're all in parallel.
The only solution I can think of is to reduce/eliminate the larger decoupling capacitor and/or try to clump a few IC's larger decoupling capacitors together while keeping the smaller decoupling capacitors close to each IC.
In my mind neither of these solutions seem ideal. What is the recommended decoupling layout for multiple IC's on a USB powered device?
The theoretical power consumption of all the IC's under use is still below the limit that can be supplied via USB 2.0.
Answer
While not exactly what you're looking for, I have used power-management ICs to accomplish this. For instance, the TPS2113APW. I prefer this specific chip because it allows me to make dual-powered devices that can operate with either a wall-wart or off the USB, automatically preferring wall-power if it is available.
If you don't need dual-powered, you could use something like the MIC2545A
Ultimately, any capacitance "behind" the power-management IC (i.e. hooked up to the IC outputs) isn't "seen" by the USB; the bus only sees the capacitance "in front of" the IC (i.e. hooked up to IC inputs).
You still have to worry about inrush current - the "plus any capacitive effects visible through the regulator" part of the spec - but those ICs also have variable current limiting. Figure out the parallel resistances that you need to have 100 mA limitation and 500 mA limitation (and optionally n mA limitation if you want to limit wall-power), and then use FETs to short out the resistors as needed to enable various limitations.
Through these chips, I have attached PCBs with several hundreds of uF to the USB, and a DMM set to fast current max verified that the inrush during attachment did not exceed 100 mA.
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