I was going through SATA3 spec. As per the spec, both scrambler and 8b/10b encoder are used in its design. Scrambler helps randomizing the data while 8b/10 encoder creates enough transition for DC balance and clock data recovery.
My doubt is that if the scrambler randomizes the data, then it should solve the purpose of DC balance and clock data recovery, because transitions of '1' and '0' are being created by the scrambler. What is the need for 8b/10b encoder then?
Answer
I'm discussing this based on my knowledge of Ethernet, rather than SATA. I don't know the SATA standard, but if it uses LFSR scrambling and 8b10b or 64b66b encoding, it should have the same benefits there that it does in Ethernet.
8b10b or 64b66b encoding provide two features that aren't available from simple scrambling:
block boundaries The encoding introduces block boundaries that allow synchronization between the transmitter and receiver. Without these boundaries, the receiver wouldn't know where one octet ends and the next one begins, much less where are the boundaries between frames or packets in higher level protocols.
error detection The encoding allows detecting any single bit error in a frame, and statistically may detect multiple-bit errors. This allows the protocol to react appropriately when an errored block is received.
No comments:
Post a Comment