Thursday, 12 May 2016

ltspice - Need help modelling the circuit with parasitic capacitance of a power supply in this scenario in SPICE


A single-ended source is connected to an inAmp of a data-acquisition board as follows:


enter image description here


As you see above, the shield is shielding the twisted shielded pair cable. The shield is tied only to the earth ground. AIGND is not connected to earth ground.


I want to make a very simplistic simulation in LTspice, to mimic this scenario when there is a 50Hz common mode noise comes through the power supply to both lines as common mode interference.



Below is my attempt:


enter image description here


There is something missing or wrong in above model.


I want to model the circuit where the common-mode interference comes through the SMPS power supply. Power supply need not to be modeled juts the noise like in my circuit. But there is also shield and the AIGND is not earth grounded.


How can I fix this to make it more realistic?


My second attempt:


enter image description here


edit:


enter image description here



Answer




enter image description here


The two capacitors near the InAmp remove common-mode AC content caused by the 1 nF in the SMPS modelled to the left. Some SMPSs will have significantly less than 1 nF and may be tamed by 10 nF decouplers but other SMPSs might have 2.2 nF internally and will need greater help hence 100 nF or greater may be needed.


Bear also in mind that if 1 uF capacitors are needed thay will reduce the output bandwidth of your source because of the 100 ohm balanced drive.


Typically, 1 uF and 100 ohm produces a cut-off frequency of 1600 Hz. However, if you are only worried about slow speed signals from your source 10 uF capacitors can be employed.


One thing to watch though - those 10 uF capacitors will produce a differential signal if they are not perfectly matched.


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