I have some questions about this circuit (from the book 'Art of Electronics'):
How can this P-channel mosfet support high source voltage (150 V)? In the datasheet it's mentioned that \$V_{gs}\$ = +- 20V, so if the voltage in the source is 150V then the \$V_{gs}\$ will be less than - 20V.
Answer
Vb of 2N5550 will be 3V. That means Ve will be 2.4V. That means Ie will be 1mA. That means Ic will be a hair under 1mA. That means the voltage drop across the 10k resistor will be 1mA * 10k = 10V. So when the logic output is high, Vgs will be around -10V and the PMOS will be ON. When the logic output is low, Vgs will be around 0V, and the PMOS will be off.
I would advise adding a Zener diode from gate to source to make sure nothing goes wrong. Also, I think 150V is pushing it. For one thing, 150V is the absolute maximum Vds, and for another thing, as SamGibson points out, the 2N5550 may breakdown even below 150. So do your due diligence if you are approaching 150V.
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