I am interfacing an SD card to the Z80, one of which uses 5 V logic (Z80) and the other uses 3.3 V logic (SD). I believe the 3.3 V to 5 V level shifting will be taken care of by the 74HC595 I am using for serial input to parallel conversion (it considers 3.3 V to be logic level high and will output 5 V logic to the Z80). However, the 74HC165 I am using to output serial data (MOSI) from the Z80 to the SD card will output 5 V logic which might fry the SD card.
I don't have any level shifting ICs laying around and would like to avoid having to wait for one to arrive in the mail. I have read that I can use a crude voltage dividing circuit on the MOSI line, but I read that it tends to cause issues at higher clock frequencies. Would the following circuit using two NPN transistors work (switching the input voltage to 5 V and the output voltage to 3.3 V)?
Or would it be better to replace the leftmost transistor with an inverter that feeds into the base of the rightmost transistor, keeping the emitter grounded, and having the collector pulled up to 3.3 V? The 5 V MOSI signal from the 74HC165 would feed into the input of the inverter, and the 3.3 V MOSI pin of the SD card would be connected to the collector of the transistor. So if I'm not mistaken, if the output is a logic level low, the inverter will power the base of the transistor, causing the output to the SD card to be logic level low as well. If the output is a 5 V logic level high, the inverter will not power the base of the transistor, causing the output to the SD card to be a 3.3 V logic level high.
Or would this still be crude? As long as there would be accurate data transmission at the correct voltage, I'm not concerned. But please let me know what you think. If this will lead to inaccurate or inconsistent data transmission, I would rather just wait for the correct IC.
Answer
Geez, that's a lot of parts.
How about this: 
And it's bidirectional to boot . . .
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