pll - Add a Tunable delay to a TTL pulse?

How can you add a tunable delay to a TTL pulse?

My understanding is that this is the job of a PPL. I am not sure if a digital PLL delays a square wave or if it can also delay a single rising edge (which is desired). I am hoping to tune the delay from 0ms to 10ms with accuracy in the microseconds.

________Rising_Edge_At_
Input__: 0,12,84,98,109,130
Output_:   10,22,94,108,119,140

Answer

A phase-locked-loop doesn't do what you think it does. It doesn't help.

I'm assuming you need to have the delay accurate on both leading and trailing edges...

Use a micro like a PIC is the easy answer but, if you can't face programming it (this is not a dig at PICs - Olin take note!) then you can use a garage full of D type flip-flops.

It works like this - you input your TTL input to a 74AC74 (you can get octal devices but I can't remember the number) and you feed a 1MHz squarewave to the clock. The output from the d type feeds the next d type's input and so on and so forth. About ten thousand d types later you can get the 10millisecond delayed output - it will retain the same shape timewise but aligned to a boundary of the 1usec clock i.e. a 1usec accuracy/resolution.

If you want to reduce the 10ms delay turn the clock up to 10MHz and the delay drops to about 1millisecond. I can't remember what the limit is on 74ACxx devices is, but with a 100MHz it would delay 100usecs. Something in the back of my mind reminds me that 80MHz is the clock limit on AC devices!!

You could use a 100kHz clock then only a thousand d types will be needed and you'll have a time accuracy/resolution of 10usecs.

I think I'd use a PIC or similar