Friday 21 February 2014

VHDL: Converting from an INTEGER type to a STD_LOGIC_VECTOR


I built a mod-16 counter, and the output result is a INTEGER (all the examples I saw used INTEGER).


I built a hex-to-7-segment-display decoder, and its input is a STD_LOGIC_VECTOR (wrote it that way because it was easy to map out the truth table).


I'd like to connect the output of the counter to the input of the decoder, but I get 'type mismatch' errors when trying to compile in QuartusII.


Is there a way to convert from a INTEGER type to a STD_LOGIC_VECTOR type in a VHDL listing?




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