Tuesday, 30 July 2019

How can a high-voltage transistor be in such small packaging?


For example:



It is said to accept more than 1 kV between its collector and emitter. It comes in a SOT-223 package (3 pins plus a tab). With a dielectric strength of 1 kV/mm for humid air, cannot an arc appear between the electrodes?


Or do you have to enclose the package in glue or other material with higher dielectric strength than air?



Answer



Hmm, it does seem tight. The pin pitch is 2.3 mm, and the maximum pin width is .85 mm, leaving 1.45 mm minimum space between pins. The transistor is specified for 1.4 kV C-E, which are on adjacent pins, so that's just about 1 kV/mm. As I said, that seems tight, and you'd have to be careful in designing the PCB footprint to not make this worse.


Usually I make PCB pads a little wider than the pins, but in this case I wouldn't. Even if you make the pads the same width as the pins, then any alignment error cuts into the spacing.



Overall, I'd prefer a larger package with more space between pins to get somewhat below 1 kV/mm.


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