I'm routing a breakout board for NXP's LPC23xx microcontroller. This MCU requires two crystals if one is using the RTC. These two crystals connect to the MCU with only 3 pins in between:
From this question, it is clear that "as close as possible" is the recommended distance, but there are tradeoffs to be made, especially when dealing with two different crystals that must be connected "as close as possible" and with traces that are "as symmetrical as possible".
In my particular design, I'd like to use rather large crystal packages (TC38 for the RTC and SM49 for the 12 MHz) for cost reasons, but even with much tinier packages, layout is not simple.
Therefore, we have several factors to consider when laying out a PCB with these two crystals:
- Crystal trace length
- Crystal trace symmetry
- Capacitor trace length
- Capacitor trace symmetry
- Common ground connection for capacitors
And, of course, each of these exists for both crystals.
How should I prioritize these factors? Should I sacrifice trace symmetry in order to minimize the length of one of the traces? Should I make the traces as symmetrical as possible, even if that means that the traces will be ~12mm long? Further, which of these crystals should I place closer, assuming I can choose one to be close and one to be further away?
Answer
The idea behind simmetry of crystal connections is that they would pick equal amount of EMI and majority of it would be cancelled out. As it was mentioned, in low-power application crystal is driven as weak as possible, so it might be very easy to disrupt it's generation.
32kHz crystal is the most sensitive.
Also, please add to your points that you need exactly 1 connection point from GND to caps. You cannot connect them to ground wire/plate in different places, because then current flowing on the ground wire/plate will generate non-compensated noice on the crystal.
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