Monday 13 August 2018

vhdl - Troubleshooting FPGA VGA connection


I have DE1 Soc development board. I have been following this youtube video in order to start casting some stuff onto the screen.


I am unable to display anything on the screen at the moment unless pitch black counts. I have initially followed all his instructions in order to see how it is done myself, but unable to get anthen ended up copying his .vhd files from git.


I am able to compile it and program it fine, pins are assigned correctly and use other peripherals.


I have found this thread useful especially that checklist.



Did you simulate your design?
Are you sure the timings in your design are correct?
Did you check the signal levels (with a scope)?

Are you sure that all the pin assignments are correct?
Have you tried it with a different screen?




  1. I have simulated the design to see whether HSYNC and VSYNC control signals are present and whether they are driven with the proper ratio

  2. Timings I have created using Altera PLL rather than Avalon PLL, as that was not available for me. Not sure what is the implication if any of usinf Avalon PLL rather than ALtera PLL. Input is 50MHz and output 108MHz still.

  3. I will do that tomorrow as wasn't able to get a oscilloscope today, when rebooting the board the initial terasic promo is displayed on the screen so it seems that the board can communicate via VGA with the TV

  4. Went through all the pin assignments twice

  5. Screen does work and nothing was showing up on a different screen.



I have went through it in detail and I think I have ticked off all the points correctly (besides actually tasting with the scope my build rather than factory one). Yet still I am still unable to get anything displayed at all. No amount of tweaking with timings, RGB selection, or any of the porches seems to change anything. Screen is constantly dark, it doesn't go into power saver mode so something must be happening.


I was wondering whether anyone has any ideas off what else could be the cause of it that I am missing or may have incorrectly assessed current state of affairs. Cheers.




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