I have written a One-Wire (1-Wire, OW) controller in VHDL for FPGA designs. Currently I use a USB-OW adapter from Dallas/Maxim on my PC to get the sensors' IDs. I would like to scan the bus directly from the FPGA and collect all IDs on that bus.
How can I do this? It should be possible, because the shipped software from the USB adapter can list all devices on the bus.
Enumerating all devices is to slow, because OW has very long IDs. I used this technique on I²C, because there are only 127 addresses to scan :).
Answer
Maxim has an application note titled 1-Wire Search Algorithm:
The strategy is too involved to accurately describe here, but the basic principle is based on:
- 1-Wire is an open drain bus: multiple devices can pull the bus to GND simultaneously.
0
s are encoded as long low pulses,1
s as short low pulses (by actually not pulling the bus low). If multiple devices write the same bit to the bus, that bit appears on the bus. If any device writes a0
to the bus, a0
appears.- as reply to the 1-Wire Search ROM command, all (selected) devices will, bit by bit, first write their own ID bit \$A_i\$, followed by the inverted ID bit \$\bar{A_i}\$. Then the master writes a bit \$S_i\$, which will select the devices for the next bits.
Based on these properties, the master can detect whether
- no selected devices are present: both \$A_i = 1\$ and \$\bar{A_i} = 1\$.
- devices with a 0 as ID bit are present: \$A_i = 0\$
- devices with a 1 as ID bit are present: \$\bar{A_i} = 0\$
This way you can see which bits are still available in your search space, and you progress down that binary tree.
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