How can I convert multiple Karnaugh maps into a logic gate circuit?

I'm designing a 8421 BCD to 84-2-1 BCD converter circuit. The truth table is:

Decimal | ABCD | WXYZ
   0    | 0000 | 0000
   1    | 0001 | 0111
   2    | 0010 | 0100
        .      .
        .      .
        .      .
   9    | 1001 | 1111

Everything after decimal 9 is a don't care. I started by creating Karnaugh maps for each W, X, Y, Z. From the Karnaugh maps, I found the following equations:

W = (A)(~B)(~C) + (~A)(B)(C+D)
X = (~A)(~C)(~D) + (~A)(~B) + (~B)(D)
Y = (~C)(D)([~A]+[~B]) + (~A)(C)(~D)
Z = (D)([~A]+[~B][~C])

Where multiplication means AND, addition means OR, and ~ means NOT. I'm unsure of how draw a circuit with the appropriate logic gates from here. Do I create a circuit for each letter and then AND all of the outputs together? Do I combine all of the expressions (as in W+X+Y+Z or WXYZ) and simplify the expressions from there, then create a circuit using the new simplified expression? I'm not really interested in what this particular circuit will actually look like, I'm trying to find tackle the more general concept of moving from truth tables to circuit schematics.

Answer

Do I combine all of the expressions (as in W+X+Y+Z or WXYZ)

No. What the equations show you are how to derive outputs for four separate pins. If you wanted to combine the four pins you should have done it earlier when coming up with the Karnaugh map (the Karnaugh map would then only have one output instead of four).

First step, treat the four as four separate circuits:

A ─┬───────────────┐
   │               │
B ──┬─[NOT]────────[AND]┐
   ││              │    │
C ────[NOT]──┬─────┘    [OR]── W
   ││        └[OR]─┐    │
D ────────────┘    │    │

   │└──────────────[AND]┘
   └──[NOT]────────┘

 .... implementation of other circuits left as homework

A ──[NOT]────────┐
                 │
B ──[NOT]──┐     [OR]─┐
           [AND]─┘    │
C ──[NOT]──┘          [AND]── Z

                      │
D ────────────────────┘

Second step, join A to A, B to B etc.. This is obvious because obviously A is the same as A etc.

A ─┬────┬───────────────┐
   │    │               │
B ──┬────┬─[NOT]────────[AND]┐
   ││   ││              │    │
C ───┬─────[NOT]──┬─────┘    [OR]── W
   │││  ││        └[OR]─┐    │

D ────┬────────────┘    │    │
   ││││ │└──────────────[AND]┘
   ││││ └──[NOT]────────┘
   ││││
   └───────[NOT]────────┐
    │││                 │
    └──────[NOT]──┐     [OR]─┐
     ││           [AND]─┘    │
     └─────[NOT]──┘          [AND]─ Z
      │                      │

      └──────────────────────┘

 .... implementation of other circuits left as homework

The circuit should be working at this point but if you're paying attention you may notice that some parts of the W and Z circuits are sharing the same logic. For example, we're using NOT on B and C twice. The next (optional) step is to refactor the circuit and remove redundant/repeated subcircuits and components:

A ───┬──────────────────┐
     │                  │
B ────┬─[NOT]──┬────────[AND]┐
     ││        │        │    │
C ──────[NOT]───┬──┬────┘    [OR]── W

     ││        ││  │         │
     ││        ││  [OR]─┐    │
D ─┬───────────────┘    │    │
   │ ││        ││       │    │
   │ │└─────────────────[AND]┘
   │ │         ││       │
   │ └──[NOT]─┬─────────┘
   │          │││
   │          └─────────┐
   │           │└─┐     [OR]─┐

   │           │  [AND]─┘    │
   │           └──┘          [AND]─ Z
   └─────────────────────────┘

 .... implementation of other circuits left as homework