I was calculating ESR for this ceramic capacitor, Samsung P/N CL21A226MQQNNWE.
Per the datasheet, DF is given as 0.1 max at 120 Hz.
Per formula, ESR = 0.1 / (2 * Pi * 120 * 22uF) = 6 Ohms.
What am I doing wrong, or is the ESR really 6 Ohms? That just seems way too high for a ceramic capacitor.
I feel a bit silly asking this, but hey, if I am confused someone else probably will be, too.
ADDENDUM Basically, the ESR for MLCC capacitors is surprisingly high at low frequencies. However, in my application, the ESR at higher frequencies is what was of interest. The graphs provided by several answers were super helpful and show how much the ESR changes with frequency. This is not something I knew about when I asked the question. I just knew that MLCC's supposedly had very low ESR (everybody knows this, so it must be true, right?). Anyway, now everything makes sense.
Answer
This is correct only as a line f* diode bridge cap. Tan delta is std at 120Hz.
It is unwise to use as that*.
Unlike some or most e-caps this ceramic cap drops to 3 mohms near SRF ,~1MHz
Look for the PDF with my graph (re-search) hint Samsung site
Answer: char. Data.pdf http://www.samsungsem.com/global/support/product-search/mlcc/1205485_4290.jsp
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