I am trying to implement the design described here to create an amplifier circuit that will amplify a 10MHz, 24Vpp signal to 120Vpp. I am using the THS3062 op-amp, and originally I was looking at using the 2SC4883A and 2SC1859A transistors. I am simulating my circuit in LTSpice using circuit models for all the parts, and found that it worked up to about ~50kHz. I tried replacing them with the CZT5551 and the CZT5401, and found that it worked up to ~300kHz.
I believe that the transistors are not fast enough, and since I have a higher voltage split supply, my transistors would need to have a high maximum Vce as well as a high speed. Is is possible to find a low-gain, high-speed, high-voltage transistor that will enable this circuit to work at higher speeds? Alternatively, could anyone recommend a modification to the circuit to make it work faster, or possibly an alternate circuit?
Here is my Spice schematic:
Answer
At 10MHz, and at 120v, how you shove current into all the capacitance of your load, and all the stray capacitance that lurks around, is critical. Let's guess at some figures. If you manage to achieve 100pF total load at your output node (your EO load, but including strays, cable, sockets, the output devices) and you want to slew that sinusoidally at 120vpp at 10MHz, you will need 60*100p*10M*2pi = 340mA, more if you want to approach something that looks more like a square wave. As your EO device is 10pF, you should be able to keep within 100pF, if you're careful.
You will need to use current drivers that are tame and predictable, and then close a fast feedback loop around them to control the output voltage.
As you are stuck with a minimum output capaitance which will create phase shift, the best plan is to incorporate that phase shift directly into your stability scheme. This is what LDOs do, while it's a different voltage regime it's the same stability problem.
The most difficult part is the output devices, as high voltage transistors tend to be slow. The smaller swings within the amplifier are easier to handle.
Here's a sketch of how the output might work. While you could use either bipolars or FETs for the high voltage common base (gate) devices Q1 and Q5, bipolars are probably better having a DC rated SOA and lower output terminal capacitance. You only need a few volts of bias across Q2 and Q6, set by the cascode bias voltages.
simulate this circuit – Schematic created using CircuitLab
Choose R3/4 to give the desired gain at DC, choose C1/C3 to keep that voltage division going correctly to high frequency. You might want to put a small resistor in series with C3 to give some phase lead. Play with the components with SPICE, use a square wave input and try to get a small amount of tame overshoot on the transitions. Depending on the amplifier you choose, you may need additional phase lead components. Google for how LDOs do this sort of thing. Faster amplifiers and transistors will make getting stability easier.
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