Both 60950 (Table 2N – Minimum creepage distances) and 60335 (Table 18 – Minimum creepage distances for functional insulation) seem to specify a minimum creepage distance of 0.4mm (~16mil) with a IIIa / IIIb material group and pollution degree of 2 at <=10V.
This seems crazy big, and I know that many boards are in production with significantly smaller spacing between low voltage traces. With the pad spacing between common microcontroller pins, for example, this is impossible to achieve. Am I understanding this requirement correctly?
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