cmos - Binary counter and load capacitance

Im desiging a circuit with a binary counter which rates it's maximum count frequency in terms of load capacitance.

Im quite confused and having a lot of trouble wrapping my head around how to calculate this.

The input to the counter im using is a typical CMOS Inverter Oscillation Circuit shown here, with the output connected directly to the clock input of the counter.

The data sheet of the particular inverter im using specifies the input capacitance as 3.5pf, and the load capacitance of the crystal can be tuned (currently 8pf), but I cant work out how to determine what the total output capacitance of this circuit is? Which im assuming is what the load capacitance to the counter will be.

I plan to use a SN74HCU04 inverter and this binary counter. The binary counter specifies the maximum frequency in terms of load capacitance on page 6.

Answer

The CL on page 6 of your counter datasheet refers to the load capacitance on any relevant output of the counter. See page 8, section 7, that defines how CL is used. Notice how as well as defining a minimum fmax, there are two sections in each table for detailed propagation delays input to output for the different output loadings.

CL is there so that IC speeds are measured and specified in a reproducible way, that's appropriate for real life circuits.

50pF is a fairly typical industry standard loading, it's not far from a bit of trace, a bit of cable, and the 30pF of an oscilloscope input. Many manufacturers also quote into a lower capacitance like 15pF as it improves the timing, and is representative of a a bit of trace and a couple of CMOS inputs.

Your design breaks down into two independent sections.

The first is the oscillator. The crystal must see appropriate capacitances to ground on both its leads, in order to oscillate properly. Use the HCU04 specification to adjust those. Use another of the inverter sections to buffer the oscillator output, so the crystal only 'sees' one inverter load, and not whatever you are driving.

The second is the counter. As long as the buffered oscillator is producing a clean logic swing, and a frequency less than the fmax of the counter, you can connect the oscillator to the counter and can expect it to work.

The fmax of the counter is dependent on what sort of loads you want it to drive. If it's only a few logic gates, then use 15pF and fmax is 40MHz. If you want to load any output directly with an oscilloscope, then it may not work at 40MHz, and you'll need to drop to 25MHz. That's what x10 scope probes are used for, they drop the possibly 50pF of cable+scope capacitance down to the 10-15pF range.

You can always make the CL that your counter sees be less than 15pF by buffering the loads, if you find the load capacitance that you want to drive is excessive.