How to calculate this LDO regulator, and how to prevent it from oscillating?

I am further playing around this PMOS LDO circuit I designed and attempted to test and rate (the Edit 3 schematic, simplified by removing the protection circuit). After I dropped in a NJM4559 op amp in place of LM358 it started oscillating (previous record was none of LM324, LM358, TL084 or OPA2134 oscillated). Is this a blessing from TI? (kidding)

How to calculate this circuit, since I have one more MOSFET than what I found in TI's application notes. If it was oscillating, how to stop it from doing it?

My way of determining whether the circuit is oscillating is checking for the Moire pattern on DMM readings since it is difficult to have the LDO oscillate at the frequency (or a harmonic) of the DMM's internal clock frequency. Is this way of checking for oscillations reliable? Don't yell at me about oscilloscopes as I don't have one to start with. Donations are welcome.

Here I replicate the circuit I tested. The op amp can be any one of the following: LM324, LM358, TL084, OPA2134 or NJM4559, and the last of which oscillated. R6 is a load resistor I attach when testing and value options are 10 ohms and 1 kiloohm. Respect the part numbers as those are exactly what I used.

^{simulate this circuit – Schematic created using CircuitLab}