Sunday, 11 January 2015

circuit analysis - Voltage across Zener diode


Let's consider this simple circuit


schematic



simulate this circuit – Schematic created using CircuitLab


with


VS=15 V

RS=500 Ω
VZ=5.1 V
RL=1 kΩ


It can be described by the system of equations


VS=RS(IZ+IL)+VZ

VS=RS(IZ+IL)+RLIL


where $V_S, R_S, V_Z, R_L$ are constant and only $I_L, I_Z$ are unknown.


Supposing that the Zener diode is inversely biased, voltage at node A will always be the Zener voltage $V_Z = 5.1 \ V$ and with these values $I_L = 5.1 \ mA$ and $I_Z = 14.7 \ mA$. If the resistance $ R_L $ is decreased, the value of $I_L$ will raise and $ I_Z $ will be lower. The limit condition is when $ R_L = R_L^* $ is so small that it requires $ I_L = I_S $ and the Zener branch has no current.


What does happen if $ R_L $ is lowered beneath $ R_L^* $ ?


What assumptions should be followed to write new equations? How would the Zener diode behave and how can it be considered?



Answer




Simply apply kirchoffs current law - Is = IL


The zener is, for all practical purposes, removed the circuit since Iz = 0 and the circuit reduces to a potential divider where Vout = Vin * RL/(RL + Rs)


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