characteristic impedance - Transmission line reflection. I would like a non-mathematical explanation

I am a licensed radio amateur, and find bewildering the many different explanations, which range from folksy urban myth to Maxwell-Heaviside Equations, of what happens at the termination of a transmission line or feeder. I realise that they all come to the same thing in the end (or should do, pun perfect), but none of them give me a gut feeling for what is going on.

I like diagrams, so an answer in terms of (graphical) phasors for the currents and voltages at the load would suit me best. How, for instance, does a step pulse down the line cause twice the voltage at an open circuit termination? Similarly for current at a short circuit. And how is the reflected step generated by the inductance and capacitance of the line?

Can anyone help, without getting all mathematical, and not telling any "lies to children"?

Answer

OK, for what it's worth, here's how I visualize it.

As you say, a transmission line has both distributed capacitance and distributed inductance, which combine to form its characteristic impedance Z₀. Let's assume we have a step voltage source whose output impedance Z_S matches Z₀. Prior to t=0, all voltages and currents are zero.

At the moment the step occurs, the voltage from the source divides itself equally across Z_S and Z₀, so the voltage at that end of the line is V_S/2. The first thing that needs to happen is that the first bit of capacitance needs to be charged to that value, which requires a current to flow through the first bit of inductance. But that immediately causes the next bit of capacitance to be charged through the next bit of inductance, and so on. A voltage wave propogates down the line, with current flowing behind it, but not ahead of it.

If the far end of the line is terminated with a load of the same value as Z₀, when the voltage wave gets there, the load immediately starts drawing a current that exactly matches the current that's already flowing in the line. There's no reason for anything to change, so there's no reflection in the line.

However, suppose the far end of the line is open. When the voltage wave gets there, there's no place for the current that's flowing just behind it to go, so the charge "piles up" in the last bit of capacitance until the voltage gets to the point where it can halt the current in the last bit of inductance. The voltage required to do this happens to be exactly twice the arriving voltage, which creates an inverse voltage across the last bit of inductance that matches the voltage that started the current in it in the first place. However, we now have V_S at that end of the line, while most of the line is only charged to V_S/2. This causes a voltage wave that propogates in the reverse direction, and as it propogates, the current that's still flowing ahead of the wave is reduced to zero behind the wave, leaving the line behind it charged to V_S. (Another way of thinking about this is that the reflection creates a reverse current that exactly cancels the original forward current.) When this reflected voltage wave reaches the source, the voltage across Z_S suddenly drops to zero, and therefore the current drops to zero, too. Again, everything is now in a stable state.

Now, if the far end of the line is shorted (instead of open) when the incident wave gets there, we have a different constraint: The voltage can't actually rise, and the current just flows into the short. But now we have another unstable situation: That end of the line is at 0V, but the rest of the line is still charged to V_s/2. Therefore, additional current flows into the short, and this current is equal to V_S/2 divided by Z₀ (which happens to be equal to the original current flowing into the line). A voltage wave (stepping from V_S/2 down to 0V) propogates in the reverse direction, and the current behind this wave is double the original current ahead of it. (Again, you can think of this as a negative voltage wave that cancels the original positive wave.) When this wave reaches the source, the source terminal is driven to 0V, the full source voltage is dropped across Z_S and the current through Z_S equals the current now flowing in the line. All is stable again.

Does any of this help? One advantage of visualizing this in terms of the actual electronics (as opposed to analogies involving ropes, weights or hydraulics, etc., etc.), is that it allows you to more easily reason about other situations, such as lumped capacitances, inductances or mismatched resistive loads attached to the transmission line.