Monday 8 May 2017

pcb - Optimize signal return path with decoupling capacitors in a two layer board


I'm designing a pretty complex two layer board - I should really go for a 4 layer one, but that's not the point here. I'm done with component placing and routing and I'm doing the finishing touches such as making sure the ground planes cover most of the board and are well stitched together (a.k.a ground gridding).



In certain areas, I have signal traces (e.g. SPI) layed out over a ground plane, then a power trace (14V), then another ground plane. There is no way I can move this power trace out of the way, so I thought I could let the signal return currents go through it by having some decoupling capacitors (100nF) between the power trace and ground planes, right under my signal traces.


Here's an image of what I'm thinking:


Signal over decoupling capacitors


Is this a good idea to reduce the signal loop area and control EMI?




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