pcb design - Bypass capacitors needed in low-frequency digital logic systems?

I know it's good practice to use bypass capacitors near the power pins of your ICs, but I'm now moving on from the breadboarding stage to the PCB-design stage, and I'd like to know if there are any good rules of thumb for when the caps are actually needed (I don't want to waste any PCB real-estate).

For example, what if I have a simple counter IC fed by a 250KHz clock signal? 31.25 kHz? If all input and output signals of an IC are changing at sufficiently low frequencies and if the IC doesn't draw much current, can I leave off the bypass caps?

Edit: inserted text in italic.

Answer

The relevant factor is the rise/fall times, not the clock rate. Here are two relevant papers. Conventionally, designers stick to 100nF cap per IC. Bear in mind that they serve multiple purposes: signal integrity, power supply noise, internal IC operation, radiated EMI, susceptability to EMI. Using an SMT 0805 or smaller (smaller is better) shouldn't take too much board space.