Why is the max frequency of AVR MCUs a function of VCC? Maybe they have constant current sources that starve as the power demands go up?
Is this relationship unique to the AVR line, or is this typical?
Edit: I am not looking for a quantitative figure or equation. I realize the function exists, and have the datasheets. I'm asking why it exists.
Answer
Generally CMOS circuits are not as fast when the Vdd is reduced (within design specifications). The drain current goes down with less gate voltage and a given Vds, so the load capacitances cannot be charged and discharged as quickly. So it is not unique to the AVR, although it may not always be shown explicitly since the specifications usually show only the guaranteed operation region, not the typical. If you plotted the typical region of operation (assuming you had some way to actually fully test the chips) you would see a smooth curve rather than the typical piecewise linear relationship.
For example, here is the specification for another Microchip (this one a PIC) part:
That is assuming the limitation is based on switching speed. It's possible there are thermally limited chips that cannot be operated at 100% duty cycle at higher voltage even if they can switch that fast- because the heat cannot be removed fast enough. Power consumption (to be specific, the dynamic portion of power consumption) increases with the square of supply voltage, all other things being equal. A little 8-bit CMOS processor is not going to be thermally limited though.
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