The accepted answer to this question notes that "every reg
variable can only be assigned to in at most one always
statement". It's clear that in a lot of cases assigning a reg
to multiple always
blocks is meaningless. However, it's seems that there could be hardware-meaning instances of a reg
in different always blocks.
For example, what if a same reg
is assigned to always @(posedge clk1)
, always @(posedge clk2)
where clk1
, clk2
never beat of the same time? There would be no race-condition.
Why is there a "hard rule" concerning reg
s in different always
blocks?
Answer
For example, what if a same reg is assigned to always @(posedge clk1), always @(posedge clk2) where clk1, clk2 never beat of the same time? There would be no race-condition.
The case you mention will not be synthesizable. The flip-flop that implements the reg
can only be clocked from one source.
As an aside, I'd like to clarify that the rule about reg
s having affinity to always
blocks affects synthesizability, not validity. Software simulator will handle assignments from different always
blocks without any problems.
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