Thursday 26 February 2015

arm - PSRAM: First operation bogus, later operations fine


I have a PSRAM driven by an STM32F2 in the default asynchronous mode. The PSRAM works fine except for the very first read or write operation.


After the first read or write operation (which produces bugus results), all the read/write operations behave as expected. The address of the first read or write operation does not change things.



I have tried inserting a one second delay between the SRAM initialisation and the first read or write operation, but that did not help.


What could I be causing this problem?



Answer



When working with external chips I've seen this issue before because the default I/O state of the microcontroller. For example, microcontroller X boots up with all I/O in a High-Z Input state. Then my code goes through, sequentially, with the initialization routine and does something like disable the pull-up, then change the I/O pin to an output, then set the default (nominal) state of the pin (this isn't the recommended algorithm, but follow me here). What that does to any parts connected to the chip is possibly clock 1 data bit (or more) into the chip because of the high->low->high procession of the I/O pin. This can range from being completely innocuous all the way up to corrupting your first transaction (as the chip is left with 1/8th of an instruction). Usually the chip cleans itself up after your 1st read/write because the internal state machine can clear things up once you pull your CE# pin high and you can go on reading/writing with ease. I would scope those pins and see what your chips is actually seeing on boot. I suspect that you'll find that it's working "perfectly" based on the inputs it's getting. If you find this is the problem, you can force boot-states on critical pins by using pull-up/down resistors accordingly to make sure this doesn't happen. Well written firmware (in the initialization routine for your peripheral) should get the IC into a known and robust state.


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