Saturday, 20 December 2014

Is this NPN transistor AND logic gate practical?


Most places on the internet that I see give a schematic for an AND gate that is something like this:


schematic


simulate this circuit – Schematic created using CircuitLab


The only thing about this is that when B is turned on but not A, which should logically output false, it seems to be somewhere between it (this can easily be seen with an LED at the output: it isn't as bright as it is if both A and B are on, logically satisfying AND, but it still lights up).



I was messing around and came up with this idea for an AND logic gate which works a bit more correct and I have been using it recently:


schematic


simulate this circuit


Essentially what I came up with when building that is Input A is put through a NOT gate which is put into another NOT gate, but the Collector on the second NOT gate is only powered by Input B. Therefore, if Input B is off, no output to begin with, but if its on but A isn't, then the first NOT gate powers the base to the second, making B ground.


I like building this design better, and it works so far for me, but I was wondering:


How practical is this design (e.g. why haven't I seen it before; are there any flaws)?



Answer



It does work as an AND gate, but there is no gain for input B -- so you can't use its output to drive another gate's Input B.


For a logic family to work well, you need to have the output signal go high and low, and also be able to drive a number (fan out) of similar gates.


You could make a gate with input A and the V+ input of Q1 -- it would generate OUT = A & not(B).



That gate would have gain.


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