digital logic - EEPROM Write Cycle Time and Write Cycle Endurance

I have an embedded software application that is copying a buffer from RAM to EEPROM. In this case, the EPROM device is a 28C010 (128K x 8). The copying is done at non-regular intervals, generally in blocks of multiple bytes. I would assume that other (not all) EEPROMs behave like this one, but this is what I have to work with.

The answers to my questions below will help determine the strategy for saving persistent information while doing real time processing.

The EEPROM is accessible just like RAM with some exceptions for writing:

• BYTE WRITE: Individual bytes can be written, and the completion of the write cycle can be determined by polling



• PAGE WRITE: Contiguous blocks of bytes can be written for bytes within the same 128-byte block, and, as long as each byte write is followed by another byte write in the same block within 150 microseconds, then the benefit of PAGE WRITE are obtained. The benefit is that completion of the page write can be done by polling at the end of the writing of the block. (There are no delays between byte writes, and the completion of the page write cycle is internalized to the EEPROM.)


• Write Cycle Endurance: There is a 10,000 write cycle limit. No other details are given.

In both cases, polling is accomplished by reading back the last byte written until the returned value is equal to the value that was written.

There are other ways to determine that a write is complete, including just waiting for the maximum specified Page Write cycle time, which is 10 milliseconds.

I intend to use polling, with the expectation that it will determine completion sooner than the 10 millisecond Page Write cycle time.

I have two questions:

1. Can I expect my polling time in Page Write mode to be proportional to the number of bytes written (or can I see some benefit from writing a few bytes as opposed to a whole page)?


2. How does the Write Cycle Endurance work? Is it applied to each byte alone or two a whole page (or to the entire memory as a whole)? In other words, if I write a partial page in one Page Write and later I write the rest of the page in another Page Write cycle, how does that affect my write cycle endurance? Does it count as two write cycles? Can someone elaborate on this?

Since Page Writes to EEPROM are completed internally by the EEPROM after the last write to a page, I can perform the writes in background in most circumstances.

The size of the blocks that are being copied will vary somewhat each time, and they can't be expected to be in multiples of the page size. They can be made to be as small as just over a page size or several pages+, based on a threshold that will be determined later.