I am using the following sequence of commands at 250 kHz SPI to initialize SD cards:
- (1 ms wait, then 80 clocks)
- CMD0 with argument 0x00000000
- CMD59 with argument 0x00000001 (turn on CRC checking)
- CMD8 with argument 0x000001AA
- CMD55 with argument 0x00000000 (prefix for ACMD)
- ACMD41 with argument 0x40000000 (HCS bit set)
Of course repeating the CMD55-ACMD41 until getting out of Idle state. The CRCs are correct (they are calculated with the appropriate algorithm). Chip Select is released after every command (including between CMD55 and ACMD41) with eight trailing clocks.
This sequence works fine for three SDSC cards I have; I can read data from them after the completion of the initialization. However, the two SDHC cards I have fail with it.
They both progress properly until CMD55 (including experiencing a 0x01 R1 response from CMD8), then to CMD55 they react the following manner:
Maxell X Series SDHC Class 4 8 GB (S708G1249 TP2T0M2B49059): No R1 even after receiving 256 0xFF stuff bytes.
PQI SDHC Class 4 4 GB (BH1013316030G): 0xC2 comes after 5 0xFF stuff bytes, which has bit 7 set (an R1 shouldn't have this bit set), otherwise it doesn't even have bit 0 set (Idle) as it should be.
Issuing ACMD41 after this on either card results in an R1 of 0x05 (Illegal command + Idle). Now what? I didn't try to initialize them with CMD1 yet (but as they are SDHC, they shouldn't react to that).
(Both cards operate normally when accessed by a PC or in a digital camera I have.)
I tried issuing other commands; they also fail in this manner. So it rather seems like after CMD8 the card somehow became totally inaccessible despite the valid R1.
Answer
I found it at last.
You have to read the full R7 from CMD8, otherwise seemingly SDHC cards deadlock in some manner so they are no longer accessible at all (I accidentally omitted reading beyond the R1).
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