Saturday, 28 December 2019

clock - Why edge triggering is preferred over level triggering?


I am trying to understand why edge triggering is preferred over level triggering. In my book it is not explained clearly. After searching online I came to know that edge triggering is insensitive to glitches whereas level triggering is sensitive. What does it mean?


Also I am not able to understand the following: "If the clock is level sensitive, the new \$Q_n\$ can rush through the logic network and change the output. To avoid this we need an short pulse to capture the output and hold it constant. But such short pulse is not easy to create, hence we go for edge triggering. The feedback problem is solved because there's insufficient time for the new output to race back to the input within duration of a single rising edge"


I did not understand why the output would not rush in level triggering and why we need a short pulse to hold the output.



Secondly, the feedback problem, since the level triggering duration is long as compared to the edge triggering, in the case of the former, the output would be fed back again to the input and it will keep doing this as long as the clock is active. What is the feedback problem?


But how will it be solved in edge triggering? If the time for falling or rising is very short, how will the output be able to propagate through all gates? Is it like, once edge triggering is applied the output will be propagate through all gates and next inputs will be considered only at the next clock edge ?




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