digital logic - Design a 3-to-8 Decoder Using Only Three 2-to-4 Decoders

Using only three 2-to-4 decoders with enable and no other additional gates, implement a 3-to-8 decoder with enable. The inputs of the resulting 3-to-8 decoder should be labeled X[2..0] for the code input and E for the enable input. the outputs should be labeled Y[7..0].

Here's my current solution. My question is, is there a better/cleaner way to do this?

Answer

There is no problem with your circuit. although I would suggest that you set pull-down resistors on the outputs. that's because the decoders usually set their outputs to high-impedance (high-Z) when they're not enabled. so the output may remain the same on the output node (because of node capacitance) and the wrong value may be read by the device that is reading the current output. making all the outputs pulled-down to GND will eliminate this problem and it will work correctly. Look at the picture below...

You can use a resistor array which is a nine pin element that has 8 resistor inside with a common pin that will be connected to ground! Easy! ;-)

^{simulate this circuit – Schematic created using CircuitLab}