while searching for a way to use the I²C bus for distances about 5m I found these 2 chips P82B715 and P82B96.
I'm wondering which one I should use (I know this is up to me).
So my question is which are the pros and cons of using one chip or the other?
Do they have the same purpose?
Answer
82B715 is a rather older device, with a limited specific function: It increases the bus current 10x. It does not however improve the threshold noise immunity (threshold levels remain the same). We used to have it in a product but dropped it - there were normally other options.
82B96 is a much more versatile device, and is able to split the bus into separate RX and TX channels. When you want really long range you can use differential (RS422/485) drivers and receivers on these lines. It has a heap of examples of how to use it in the data sheet. If you are using something like a PIC at the master end, it can drive 20mA, so you may only need to have 82B96 at the slave end, not both ends.
For 5m you may simply not need to do anything, I2C is capable of this, and is rated for 100kHz with 3mA, 400pF
See our note about this: http://www.i2cchip.com/i2c_connector.html#Crosstalk 5m of cable might be 5x55pF=275pF i.e. not too much.
Suggestions:
Use 5V not 3.3V. Use I2C slaves (CMOS levels) not SMBUS that have TTL input levels
Use a shielded or twisted cable
DON'T put SDA, SCL together, especially don't twist them together. Twist SDA with VCC and SCL with GND, and have 100nF between VCC and GND at each end. (If you look carefully in the 82B96 circuit you will see that NXP show the bus wires arranged this way.)
Use some sort of constant current pullup arrangement. The easiest is just to have pullup resistors to +12V, and diodes clamping the SCL/SDA line to 5V. This is very simple, but makes a big improvement to your signal quality and speed. e.g. 3k3 pullups = 3.6mA bus current.
DO check waveforms with an oscilloscope and lower the bit rate so you can get full swing
best when the far end is being powered from the master. i.e. there are no possible ground loops formed in the power arrangements. BYPASS CAPACITORS are needed.
You can just increase the bus current. Many I2C chips can pull down more than 3mA. Perhaps 5 or 10mA will work fine if needed (not really for 5m)
Isolate the long bus if you can i.e. don't use it for all the internal chips at the same time so that noise problems don't afflict a whole system
be aware of I2C bus lockup, which can be caused by extra (noise) clock pulses, and make sure that you master can clear it. Section 19 of our bl233 datasheet explains bus deadlock.
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