Gain and Rise Time with Transimpedance Amplifier Circuit

I'm working with a transimpedance amplifier circuit using a Silicon Photomultiplier. The reference circuit is shown below:

^{simulate this circuit – Schematic created using CircuitLab}

This circuit is the recommended transimpedance circuit for reading SensL's silicon photomultiplier. A link to their product page is below. We used this circuit as a starting point for our actual circuit below.

^{simulate this circuit}

These amplifiers are on separate channels, and the only thing that they have in common is the -30 V bias and the op-amp power supplies. Otherwise, they are independent of each other. Below is an image of the layout.

The board is a 6-layered board with its unique shape to separate the SiPMs from the power header at the other corner while keeping the SiPMs close to each other. The outputs are are separated on individual layers, so they do not reside on the same plane except at the end when they have to go to the bottom layer to reach the connector. Despite the appearance, all six layers are ground planes, just shown unfilled for routing illustration.

Through working with circuits like this, I'm kind of getting an understanding of how the circuit works, converts a current signal into a voltage signal, but I'm having trouble trying to understand the relationship between the feedback elements, in both the frequency domain and the time domain to relate the gain, the rise-time, and the filtering.

From what I calculated, the gain of the output signal is primarily controlled by Rf, so nothing new there. In regards to the filtering, Rf and Cf form a low pass filter: Rf / (1+ [j*2*pifRf*Cf]), and this simplifies to 1/(1+[j*2*pifRf*Cf]) since Rf is just the gain of the signal. In regards to the rise time, is it correct to view it as a basic RC circuit considering only the feedback resistor and capacitor components, or would doing so miss something?

The reason I'm asking is because I'm trying to provide a high gain for the output of the amplifier while keeping the rise time as small as possible. With the nominal values shown in the schematic, we're getting around 20-30 ns. My team and I have tried using smaller capacitors, 1 pF, 0.5 pF, 0.3 pF, and 0.1 pF in place of 3 pF, but the results are the same (aside from the increased noise) with the rise times at 28 ns. If we reduce the capacitance, surely the rise time would get smaller, but for it to stay the same seems odd. Again, the goal is to keep the rise time low while keeping the gain high.

http://sensl.com/products/j-series/

To be more specific, we are using a 6mm high-density silicon photomultiplier, the MFJ60035-TSV. Rise time for the anode-cathode output is 300 ps, and the capacitance at the anode output is 4000 pF. It doesn't say anything about capacitance at the cathode. Max current is 15 mA, while the active area is 6.07 mm x 6.07 mm. The device requires a typical breakdown voltage of 24.5 V, so that's why we have that large -30 V bias at the anode.

EDIT: Here is the datasheet for the amplifier, along with the product page for the resistor:

http://www.ti.com/lit/ds/symlink/opa656.pdf

https://www.digikey.com/product-detail/en/yageo/RC0402JR-07470RL/311-470JRCT-ND/729429

The resistor is nothing special, being 0402 and rated for 1/16 watts. In regards to the op amp, I don't know much about op amps aside from the ideal one, so parameters such as the slew rate are new to me. The slew rate is 290 V/microsecond, but what does that have to do with the rise time?

Below are the capacitor parts that were used:

https://www.digikey.com/product-detail/en/murata-electronics-north-america/GRM1555C1H3R0WA01D/490-8204-1-ND/4380498

https://www.digikey.com/product-detail/en/kemet/CBR04C108B5GAC/399-6153-1-ND/2732136

https://www.digikey.com/product-detail/en/murata-electronics-north-america/GRM1555C1HR50CA01D/490-5959-1-ND/3721316

https://www.digikey.com/product-detail/en/samsung-electro-mechanics-america-inc/CL05C0R3CB5NNNC/1276-1618-1-ND/3889704

https://www.digikey.com/product-detail/en/murata-electronics-north-america/GJM1555C1H1R0BB01D/490-6073-1-ND/3845273

They were chosen for their size and voltage rating. I thought that 50 volts would be plenty for this application.

EDIT: Below is a scope waveforms of the circuit. This image should be the base value of 3 pF. I apologize for the quality, but it was all I was sent. I will try and see if I can get a better one later on.

Below is another waveform, again 3 pF. These waveforms are from two separate boards. The signal in green is from a board containing one SiPM, while the purple signal comes from a board holding 4 SiPMs. Only one SiPM is active on both of the boards. I think that the amplitude difference might be due to the -30 V bias being spread out across multiple SiPMs.

Here is an image of some other waveforms with different capacitors. This one below contains waveforms of signals with Rf being 470 ohms and Cf being 0.3 pF and 0.1 pF. The green signal is 0.3 pF while purple is 0.1 pF. Both rise times are about the same at around 30 ns.

Again, with the following picture, Rf is still 470 ohms. Green is 1.0 pF, while purple is 0.5 pF. Rise times here are approximately 27 ns.

Given the 'variance' on these rise times for the different valued capacitors, it seems that there is some upper limit for the TIA. Decreasing the capacitance past 3 pF seems to do nothing for the rise time and just increases the noise, though I don't really understand why this is.

EDIT: Since someone brought it up, ideally, I was expecting a rise time of 10 ns given the values. Below is a simulation of my circuit. The SiPM model is a model provided by the manufacturer, and the voltage bias is already taken care of in the model so there's no need for a -30V bias at the anode. I had to give it an external pulse in order to 'activate' the SiPM, so it was just a simple 5 V pulse. You can see it in the figure in green. The blue is the output signal, and it's rise time is 9.98 ns given a 50 ohm output load.

I mentioned this in comments, but I wanted to put it in the body so it's more concrete. My team and I did some test involving changing out the feedback resistor while keeping the capacitance the same at 3 pF. By reducing the feedback resistor, we were able to make the rise time faster at the expense of a smaller voltage gain. Making Rf 235 ohms reduced the time from 27 ns to 18 ns, and reducing it down to 50 ohms got us a 10 ns rise time. Now, we're trying to do the opposite, reduce the capacitor while keeping the resistor the same at 470 ohms, but it seems odd that anything below 3 pF still results in the same rise time of ~30 ns.

SCR circuit falsely triggered during capacitor charging

I am building a coil gun. Above is the complete schematic of the voltage boost circuit plus the trigger circuit.

Not shown in the schematic, there is a push button switch between the regulated +9V and the Vcc of the 555. When the switch is pressed, the capacitor bank begins charging.

On the other side, I have a microcontroller supplying a 5V pulse to a 4N25 optocoupler. The microcontroller ground is isolated from the ground of the coil gun circuit. When triggered, Q3's base is pulled towards ground which supplies current to the gate of the SCR, turning it on. D1 is used as a flyback diode to prevent reverse charging of the capacitor bank when the SCR turns off.

An important point: before firing, I disconnect the charging circuit from the capacitor bank to prevent the battery from discharging through the SCR.

My Problem

I run into trouble when I charge the capacitor bank with the coil and trigger circuit connected. The gate of the SCR is triggered immediately, causing everything to heat up quite fast.

I have the boost converter circuit soldered onto a piece of protoboard, but the triggering side of the circuit is breadboarded. The wire running to the gate of the SCR is about 6" long. I know there is a lot of EMI generated by the boost converter, but I'm not sure if that's the issue or something stupid I'm doing.

What I Have Tried

1. I've tried adding a shunt capacitor between the gate and cathode of the SCR. Did not work.


2. I've tried reducing the SCR gate-cathode resistance. Did not work.



3. Even with the SCR gate grounded, the circuit still triggers. Does this mean that I am forward-voltage or dv/dt triggering the SCR?

Update

Doesn't look like I'm getting many responses on this, but I'd like to update that I solved the issue by removing the triggering mechanisms from the breadboard and soldering them onto the PCB. I also shortened all the wires significantly and added a 10uF capacitor across the gate and cathode of the SCR. This seems to have solved the issue for now...

6 phase forked star transformer

I have a problem i'm trying to get to the bottom of. I am basically trying to find the secondary line voltages of a three phase delta primary, with a six phase forked star connected secondary transformer. The link shows the configuration of the forked star connection, and the phasor diagram to aid it http://www.vias.org/matsch_capmag/img/matsch_caps_magnetics-936.png

My issue is that using the normal equation of root 3 x Vphase/n gives doesnt give me the line voltages for all 6 phases, and looking for line to line voltages I really dont know where to start and there isnt much documentation available on these systems. Any help would be appreciated for me to understand this.

If i had say 11kV primary line voltage (delta) with a turns ratio of 100:1, how would i work out the secondary line voltages of a 6 phase forked star configuration as shown in the link?

Thanks for any help in advance.

raspberry pi - Read state from LED in another circuit

For a current project, I have to read the state of an LED in another circuit with a Raspberry Pi.

My current schematic is this:

^{simulate this circuit – Schematic created using CircuitLab}

Everything inside the dashed box is not physically accessible to me in the final version of the project so I can only attach the wires next to the button. (The LED is still visible)

Now when I start my code for reading the state of Pin 12 with the internal pull-down resistor I only get 0s as Output.

Code for reading the Pin (with pull-down) :

import RPi.GPIO as GPIO
import time

GPIO.setmode(GPIO.BCM)
GPIO.setup(12, GPIO.IN, pull_up_down=GPIO.PUD_DOWN)


for i in range (5):
    print GPIO.input(12)
    time.sleep(.01)
GPIO.clear

Output (pull-down) :

0
0
0
0

0

My idea here is that the current might go through the resistor and not the pin but I am not sure on that one.

So if I eliminate the pull-down and try the same thing again I'll get an alternating pattern of 1s and 0s.

Code for reading the Pin (without pull-down):

import RPi.GPIO as GPIO
import time

GPIO.setmode(GPIO.BCM)
GPIO.setup(12, GPIO.IN)


for i in range (10):
    print GPIO.input(12)
    time.sleep(0.01)
GPIO.clear

Output (no pull-down) :

0
1
0

1
0
1
0
1

From my understanding this comes due to missing pull-down resistor since the current has nowhere to go so it is creating this interference.

Now I wanted to ask how it would be possible for me to get the current state of the LED with circumstances given and where this alternating pattern is coming from? (Maybe it's a misunderstanding of pull-down resistors).

Solution:

Thank you @Transistor

the Pi needs a return path for the sensing current.

The final schematic is this:

^{simulate this circuit}

Now the Output is:

• LED off : 1


• LED on : 0

Answer

Yes the Pi needs a return path for the sensing current.

^{simulate this circuit – Schematic created using CircuitLab}

Figure 1. The Pi needs a ground reference to the original circuit.

If the LED box is fully isolated then you can do this:

^{simulate this circuit}

*Figure 2. For isolated units the contact voltage can be monitored as shown."

With the switch open the Pi GPIO will read 'high' and with the contact closed will read 'low'.

Proper use of a voltage regulator

I want to power a prototyping kit for an 8 pin picaxe micro-controller with a 9v battery (the board itself requires a 5v input).

I have the following regulator: https://www.sparkfun.com/products/107

On the 3rd page of the data sheet says that for that 5v regulator, the min voltage is 7 and the max voltage is 25 (input).

data-sheet: https://www.sparkfun.com/datasheets/Components/LM7805.pdf

However, in the comments section of the first link,a few people said that it is not a good idea to use this regulator to reliably drop voltage from 9v to 5v.

Questions: What do you think? Does that voltage regulator fit my expectations?

What would happen if I find that 5v battery and connect the 5v battery to the voltage regulator? What voltage would it output?

Thanks so much!

Answer

The regulator will work perfectly if you keep within the datasheet specs. If you supply it with less than 7V it will lose regulation.

Things to be aware of are that if you supply power with a 9V battery and try and draw too much current, the battery voltage will eventually sag below the 7V required (this is likely what was happening to the first commentor)

Also, the higher your input voltage, the more power is dissipated in the regulator so you may need a heatsink. There are many answers on here that go through all this. To tell you whether you would need one we would need to know how much current you are planning on drawing from it at what input voltage.
If it's 9V, then assuming a maximum ambient temperature of 50°C, a maximum operating temp of 125°C:

(125 - 50) / 19 = 3.95W maximum.
at 9V:
3.95W / (9V - 5V) = ~1A maximum

If it's just the microcontroller you are powering though, then it's almost certainly no problem. As we can see over an amp would be needed to needed to reach maximum operating temperature (even if reached, it's unlikely to break - it will just shut down) Your kit will probably only draw a few milliamps, maybe up to 100mA with all pins driving heavyish loads.

communication - In a USB cable, is it OK to swap the D+ and D- wires?

I heard that D+ and D- are differential signals, does it matter if I swap them when connecting a USB device to the computer?

Answer

Summary

When entering and exiting the idle state, the polarity is important and swapping the D+ and D- lines will cause problems.

Data Transmission

USB data is NRZ-coded such that "One" is represented by no change in physical level, and "Zero" is represented by a change in physical level (see figure below). Therefore, inverting the signal (for example, by swapping D+ and D-) results in no functional change during data transmission. But there may be problems before and after data transmission which can kill communication with the device.

Exiting Idle State

The host includes 15 kΩ pull-down resistors on each data line. When no device is connected, this pulls both data lines low into the so-called "single-ended zero" state (SE0 in the USB documentation), and indicates a reset or disconnected connection. A USB device pulls one of the data lines high with a 1.5 kΩ resistor. This overpowers one of the pull-down resistors in the host and leaves the data lines in an idle state called "J". For USB 1.x, the choice of data line indicates of what signal rates the device is capable; full-bandwidth devices pull D+ high, while low-bandwidth devices pull D− high.

While the data is NRZI-encoded, the synchronization sequence and EoP are defined in terms of fixed states (J/K/SE0). When D+ and D- are switched, the J state is switched with K and SE0 is still SE0 (both lines low). So the sync sequence and EoP will become incorrect on inversion. In USB 1.x, if D+ and D- are swapped, a full-bandwidth devices get recognized as low-bandwidth and vice-versa. So the device will not even communicate at the same speed as the host.

Entering Idle State

A USB packet's end, called EOP (end-of-packet), is indicated by the transmitter driving 2 bit times of SE0 (D+ and D− both below max) and 1 bit time of J state. After this, the transmitter ceases to drive the D+/D− lines and the aforementioned pull up resistors hold it in the J (idle) state.

With a D+/D- swapped driver, the host will see the sequence (SE0, SE0, K) instead of the correct (SE0, SE0, J). The host might then fail to recognize the end of packet, which would cause problems.

Conclusion

If the device and host adhere strictly to USB specifications, swapping the D+ and D- pins will result in a failure. Its conceivable that the designer of the host foresaw such a failure mode, and built in compatibility for it. But whether or not such a swapped cable would be functional in practice, it certainly would not adhere to the specifications.

Another member, Andrew Kohlsmith, experienced this when the pins of a USB hub were accidentally swapped. The problem manifested itself as connected devices not showing up. The USB device would show it was powered but it was not recognized at all by the computer on the upstream side of the hub (which was wired correctly to the host).

Source: wikipedia

Edit: thank you to those who commented. I added emphasis and details from your helpful notes.

batteries - Use GPIO to disable voltage divider

I'm using a voltage divider to read the battery level of a wireless sensor platform using STM32L151. I'm shooting to use 20k for R1 and 10k for R2, to be under the 50k limit of the MCU's ADC peripheral.

How do I calculate the current wasted by the divider?

Originally, I was planning on using a P-channel MOSFET to enable the divider when taking measurements to reduce power consumption, but I see that MOSFETs have leakage current and raise the part count.

Can I just set the GPIO to push-pull as the ground for the divider and set it low when I want to measure and high when I don't?

Answer

First thing - if the ADC is okay with 50K you can use 150K and 75.0K (the source impedance will be exactly 50K).

The current used by the divider will be 4.3V/225K = 19.1uA.

Unlike most micros, I think you can actually lift the lower end of the divider and reduce the current, if you pick a 5V-tolerant input that is shared with the ADC and use another 5V-tolerant pin for the divider control. At least that is what it looks like to me. You would set the control pin to low/output for divider operation and have the ADC input active. To disable set both pins to digital inputs.

Joystick with the Arduino

How do i go about using the joystick with an Arduino?

Answer

This is brilliant!

a new Joystick from Sparkfun with the example code to getting it running on the Arduino

What's the reason to make power supplies external?

Many years ago most electronic devices had internal power supplies only - there was a mains voltage cable running into the unit where mains AC would be converted and distributed for consumption. That was typical for shavers, TV sets, monitors, printers, other stuff.

Now I see more and more devices that have external powers supplies. Either it's a box with two prongs that is plugged right into the outlet or it's a separate box with a mains cable running into it. Either way it has some 12V to 36V DC output cable that is then plugged into the device.

I could see the following reasons for such design:

• easier to suite for different voltages and outlets - one single model of device can be equipped with an adapter suitable for the market it targets


• less wire with mains voltage - less metal and insulation


• less wire with direct mains connection - lower risk of electric shock.

What are actual reasons for making power supplies external?

Answer

Yes, I mostly agree with Martin. I've been in early design meetings where we wanted to provide a direct line cord, but that eventually got shot down due to the hassle and expense of getting regulatory approval. We know that consumers don't like wall warts, but unfortunately the compliance issues in getting a product to market force this tradeoff.

It's actually not a legal requirement. There are surprisingly few of those, at least here in the US. However, in reality you can't have a consumer product that uses wall power in some form without UL or equivalent certification. You can follow all the best design rules and know your product is at least as safe as others with approval, but nobody wants to gamble on the liability of not having their butt covered by UL. Major retailers, for example, wouldn't touch it without formal approval.

If your product sells in the millions, sooner or later someone is going to do something stupid and get zapped. It may even be deliberate fraud just to try to extract a settlement, but that matters little. It helps tremendously in the legal process to say that your product followed "accepted safety practises" and was certified to that effect by UL or equivalent.

If you use a external approved power supply so that low voltage only goes to your unit, you are pretty much off the hook safety-wise. The external power supply provides the isolation, and as long as voltages in your unit are 48V or less and limited to a particular current (I forget the limit), you're basically fine.

For moderate product drawing 10s of Watts or more, it's usually worth it to put the line cord on it directly. Plenty of manufacturers make pre-certified power bricks you can embed into the product. You still will want certification for the whole product, but that's a lot easier and cheaper if you are using a power brick that has already been certified. In that case they usually just look for overall insulation and spacing, that the proper fuse is before the power brick, the mechanics of how the power enters the unit, etc.

If the product is intended for international distribution (and more are these days), you put a standard line cord socket on the product, then provide localized line cords. Power bricks that work over the worldwide range of roughly 90-240 VAC 50/60 Hz are pretty common these days. After a few 10s of Watts, most will have power factor control too.

switches - Integrating momentary switch with a Raspberry Pi

Please note: Although my question involves a Raspberry Pi, this is a pure electronics question at heart.

---

I'm trying to figure out how I can wire this illuminated momentary switch to my Raspberry Pi 1 Model A (hereafter RPi) such that:

• The switch is normally open



• When pushed down: it closes the circuit, lights up and fires a HIGH signal to a GPIO input pin (GPIO 04 in my case)


• If needed, I can make the GPIO 07 pin an output pin and make it available to help run the light/LED inside the switch, but not sure if that's needed

I will be setting the RPi's internal resistor on this pin, so I don't think I need a resistor for the switch, but I believe I still need one for the switch's LED/light (please confirm!). I will also be working out a "debouncing algorithm" at the software layer if needed.

But I'm stuck trying to figure out how to wire the dang thing to my RPi:

According to page 15 of that switch's datasheet:

So I'm not sure:

• What GPIO 04 on the RPi is supposed to connect to on the switch; and


• What I'm supposed to do with Pins 1 and 2 on the switch; and


• What I'm supposed to do with Pins X1 and X2 on the switch; and


• What I'm supposed to wire GPIO 07 up to (if anything)

Can anyone nudge me in the right direction here?

Answer

From page 16:

• A current-limiting resistor is built into the LED Lamp, so external resistance is not required.

You have the A22NZ-BNM-TWA model, so 6VDC is needed.

I'm assuming that since you are using this button you have 6VDC available. Since you can't drive 6VDC and any significant current with the RPis GPIO, you could do the following:

^{simulate this circuit – Schematic created using CircuitLab}

frequency modulation and incoming signal selection

I have some understanding of what frequency modulation entails - it entails "adding" a new frequency to the frequency spectrum of a signal. But how, exactly, is a modulated signal selected in the receiver? Say you're listening to your car radio and want the radio signal modulated at 80 Hz or something. How does the actual system select it? In general, not in car radios specifically.

Answer

First of all, realize that all forms of modulation add frequencies to that of the carrier. These frequencies appear close to the carrier so that the modulated signal can be selected with a bandpass filter. You do this by tuning the radio to a specific station. Then the signal from the selected station is demodulated. For amplitude modulation, a detector sensitive to amplitude variations is used. For frequency modulation, a detector sensitive to frequency variations is used. This is a greatly simplified explanation. For details, you need to look in any communications textbook or search the internet.

microcontroller - dsPIC 30F6012A will not read RD9, appears to be software problem

I'm using a dsPIC 30F6012A. I have two PCBs with this chip, both displaying the same symptoms, implying it's not one-off damage. RD9 is definitely being driven to five volts, confirmed with a multimeter. Older versions of my firmware read digital input RD9 without problem. Newer versions do not; RD9 is always read as low, regardless of the actual voltage on the pin. There are no differences between the code versions that are obviously related to RD9. RD8 and RD10 read correctly. I've updated MPLAB X and the XC16 compiler to the latest versions, without effect.

What software issues could cause a digital input to always read low?

The relevant assembly for my current compliation is:

177:                       TRISD = 0xFF07;
002214  2FF074     MOV #0xFF07, W4
002216  881694     MOV W4, TRISD


debounce_input_state.RTR = PORTDbits.RD9;
0027C6  8016A4     MOV PORTD, W4
0027C8  DE2249     LSR W4, #9, W4
0027CA  624261     AND.B W4, #0x1, W4
0027CC  FB8204     ZE W4, W4
0027CE  620261     AND W4, #0x1, W4
0027D0  DD2249     SL W4, #9, W4
0027D2  804346     MOV debounce_input_state, W6
0027D4  2FDFF5     MOV #0xFDFF, W5
0027D6  630285     AND W6, W5, W5

0027D8  728204     IOR W5, W4, W4
0027D2  8845C4     MOV W4, debounce_input_state

I've tried different reads of PORTD in different places, without apparent benefit or change. LATD is never referenced in my code, and the reference to TRISD above is the only reference. Forcing TRISDbits.TRISD9 to 1 immediately before read doesn't have any benefit. There are only two peripheral attached to the same hardware pin, and they're explicitly disabled, and should not interfere with digital input in any case.

Debugger agrees with my observations: PORTD<9> never reads high, while <8> and <10> do. TRISD<9> is set high. PORTD<9> is shown as going high in the debugger on my old firmware. Relevant code from old firmware is as follows:

172:                       TRISD = 0xFF07;
002210  2FF070     MOV #0xFF07, W0
002212  881690     MOV W0, TRISD

530:                       debounce_input_state.RTR = PORTDbits.RD9;

0027E0  8016A0     MOV PORTD, W0
0027E2  DE0049     LSR W0, #9, W0
0027E4  604061     AND.B W0, #0x1, W0
0027E6  FB8000     ZE W0, W0
0027E8  600061     AND W0, #0x1, W0
0027EA  DD0049     SL W0, #9, W0
0027EC  8045C2     MOV debounce_input_state, W2
0027EE  2FDFF1     MOV #0xFDFF, W1
0027F0  610081     AND W2, W1, W1
0027F2  708000     IOR W1, W0, W0

0027F4  8845C0     MOV W0, debounce_input_state

It appears to be semantically identical, just different register names.

Answer

As past me (what an arrogant gasbag) points out, setting C1CTRL<15> enables IC2, disabling RD9 as GPIO. Even if you manually disable IC2 after that point, RD9 still can't be used for GPIO.

Using voltage divider in a circuit

I am designing a circuit for SIM900 and PIC MCU. I am facing few problem on power supply for them. I will be giving 12v to the circuit. Now PIC works on 5volts and SIM900 works on 3.2v - 4.8v. At first I thought of using two different voltage regulators. But Now i am using 7805 to convert 12v to 5v and then using a voltage divider to convert 5v to 4v. Below is the schematic:

Here input voltage is 12v and using 7805 to convert it to 5v which will be given to PIC MCU. This 5v is also used in voltage divider circuit to convert it to 4v for SIM900. I have used R1=100 and R2=400 for voltage divider circuit. Is this circuit safe to use. Does voltage divider circuits are good to use. Please help. Thanks.!

Answer

Don't use voltage divider unless in these situations:

• 
  
  

  high impedance load

  
  


• 
  

  inaccurate voltage

  
  


• 
  

  almost fixed current consumption circuits

  
  

If you have a digital circuit with different current consumption it means you have a variable load then your output voltage will vary in a wide range. This will affect performance of your circuit.

For better efficiency I suggest use a two stage regulator, first stage is a switching regulator with efficiency up to 85%. This stage will deliver you a 5 volt regulated voltage. In second stage use a linear regulator to produce 3.3 voltage. In this scenario you will have a good efficiency behind a stable circuit for your digital circuits.

Always remember : power supply is the most important thing in a circuit for working stable and desirable.

resistance - Will doubling thinner wire in lieu of thicker wire work?

I've been needing a jumper cable for a while and have plenty of 10 AWG copper wire lying around. From what I've read, 6 AWG wire is recommended for jumper cables. I want to make a 7 foot cable.

So, I was wondering if it would be possible to use three (or more if needed) 7-foot pieces of 10 AWG wire, and use them instead of one 7-foot piece of 6 AWG wire? Would the 10 AWG x 3 cable be able to handle as many amperes as a single 6 AWG wire can?

Answer

Yes, keeping in mind that the rule is that an increment of 3 in AWG numbers represents a halving of the cross-sectional area of a wire. The current capacity is directly related to that area.

This means that to create the equivalent of a wire of AWG(N), you need two strands of AWG(N+3), or three strands of AWG(N+5). Three strands of AWG(N+4) gives you some extra safety margin.

reuse - Using recycled components

To what extent and which components can be salvaged from 5-15 years old electronic devices? In other words, what is feasible to dismantle for hobbyist use and what is not? Especially, is it ok to reuse surface-mounted ICs?

My own experience tells, that resistors, transistors, small capacitors survive quite well, but I am not sure about small diodes, small and surface-mounted electrolytic capacitors, crystals. Also, I have bad experience with recycling connectors (pins get out of plastic case).

Somewhat related, how to check non-trivial components? Do some of them loose precision a lot?

Maybe, there is some specialized web resource on the topic and or guides.

UPDATE: I am really interested in an answer from persons, who had more or less extensive practical experience with recycling different kinds of components. Personally I do not recall anything failed because of thermal impact of desoldering (but I have no experience with SMDs). And this makes this question even more interesting, because answers so far are discouraging the practice.

Answer

So much of this depends on the quality of your desoldering technique. I have personally found that, when it comes to removing components, very short exposure to high heat is preferable to prolonged exposure to low heat. That being said, I would NEVER re-use an aluminum electro - (if you MUST, at least check it with a reliable ESR meter first). Film caps take desoldering well as long as the barrel of the iron is kept away from the cap's body.

Metal film and wirewound resistors can reliably survive desoldering and keep their value within spec; carbon films and (especially) carbon comps will sometimes "open up" in value to a small degree - (sometimes this is acceptable, sometimes not; check them with an ohmmeter before using).

I've not had any problems desoldering diodes that are designed to take any degree of heat (such as DO-41's, DO-35's, DO-204's, etc.) Also, these are usually mounted "off-the-board" slightly. I've never bothered w/SMD diodes or small signal (1N914/1N4148) diodes as they're extremely cheap new.

But you asked about SMD chips in particular. I can only impart my personal experience, which is as follows:

SOT's and SOIC's - Very doable, but having one of those threaded IC desoldering tips for your iron (which heats all pins simultaneously for easy removal) is a major plus.

SSOP's - Hit or miss. I've had many successes (and a few failures), but I generally don't bother unless it's something I really need immediately.

QFP's/LCC's and the like: Forget it!

Hope this helps.

safety - Guidelines for determining shock hazard of capacitors

I'm looking for guidelines on how to identify capacitors which have the potential to cause pain, injury or death due to electrical shock if not handled correctly.

I recently purchased a "getting started with electronics" kit from Radio Shack. It contains an electrolytic capacitor of 1,000 µF and 25 V. I'm assuming this particular capacitor doesn't have the potential to cause such harm because it was included in an introductory kit. However, at what point does a capacitor have the potential to cause pain, injury or death due to electrical shock?

Ideally, I'd like links to reference material on the subject.

Answer

First, it is not the capacitor that can harm you, but the voltage and charge stored in the capacitor. So all capacitors are safe when uncharged, which is what they are when you buy them.

To do harm to your body, the voltage across the capacitor's terminals must be high enough to cause a harmful effect on you. There are no hard rules for at what voltage things become harmful, but a common 'rule of thumb' is that DC up to 48 Volt is considered low voltage. So a capacitor charged to a voltage below 48 V is fairly safe.

That does not mean that a capacitor that is rated for 25V is necessarily safe: it is guaranteed to work to 25V, but it is not guaranteed that it won't work up to let's say 70V. And it also does not mean that a capacitor that is rated for 1000V is harmful: it is only (potentially) so when charged above 48V.

There is another form of harm: a capacitor with a very large capacity, charged to an otherwise safe voltage, can cause a very high current when its terminals are shorted. The sparks and heat can harm you, and the capacitor itself could explode. No need to worry about this effect with you garden variety capacitor up to below let's say 1.000 uF, but shorting a capacitor is something you should avoid nevertheless.

Low voltage power lines - formula for spacing between poles?

What is the distance or separation between pole-pole in a 230 VAC distribution line?

Is there any formula for this, or we can take any distance?

Answer

The spacing between towers is a function of:

• 
  

  The type of conductor used.

  
  

  This is mainly determined by electrical design objectives (i.e. minimum current-carrying capacity). Environmental parameters also play a part.

  
  

  Modern aluminium overhead conductor comes in several different alloy compositions, some optimised for electrical characteristics, others with steel reinforcement-wires for strength, and others specialised for harsh environments (i.e. marine salt spray, near coastlines.)

  
  


• 
  

  The maximum permissible tension on the conductor.

  
  

  This is limited by the tensile strength of the conductor, which has to support the conductor against the downwards force of gravity, and the sideways force of the wind, at the maximum wind speed for the geographic area.

  
  
  

  If you live in cyclone/typhoon/hurricane country, the wind speed can exceed 200 km/h sustained or 278 km/h gusts (Australian Category 5 cyclone.)

  
  


• 
  

  The maximum conductor sag.

  
  

  The conductor's temperature varies depending on the ambient temperature and the load (amperes) being carried by the conductor. As the conductor heats up, it lengthens due to thermal expansion, and the conductor sags closer to the ground.

  
  

  The transmission line must be designed to maintain a minimum clearance over the ground, at maximum sag. This is especially important when crossing roadways - if a transmission line sags too close to the road, a vehicle might hit the line as it drives past.

  
  

Transmission line design sits at the intersection of electrical engineering, mechanical engineering, civil/structural engineering, and materials science. There is no one "formula" that gives the tower spacing distance. The tower spacing distance is part of the overall transmission line design, and needs to be calculated with respect to many variables.

With that said, for common distribution lines, i.e. the 11kV HV + 415V LV distribution lines around my home-town, I would imagine the local distribution company might have a "typical" design. This might read something like: "8m wooden poles, with 6/1/3.75mm ACSR conductor, 4/3/2.5mm earth wire, tower spacing of 50 metres". Such a design would be conservatively engineered considering the local conditions (heavy salt spray and cyclonic winds, in my home town.) It wouldn't translate around the world.

battery charging - Feed a "solar" charge controller from AC->DC power supply?

In considering a DIY UPS-ish system (small bank of AGM batteries and an inverter), I knew I wanted/needed a charge controller, but most I found were just intended for keeping e.g. car batteries topped off.

It has since occurred to me that "solar" charge controllers, of which small 10-30 amp versions are in abundance, run off DC input anyway.

Is there anything wrong with feeding any typical charge controller intended for solar panel input with mains power via an ordinary DC power supply like you'd find on, say, any amateur radio operator's desk? Any special considerations beyond making sure I don't feed the controller more voltage than it can handle?

Answer

That sounds like a good idea if you can't find a "proper charger" - which certainly do exist.

Some of the solar chargers are very good, with equalisation cycles and more.

I can't immediately think of any disadvantage of doing this. 12V solar chargers are designed to take Vin of at least 18V and probably 20V+. If you get one with "proper: MPPT it will probably allow you to get maximum charge out of a given voltage source. I say 'proper" MPPT as some of the new controllers use quasi MPPT where they load the source to a specified percentage of source Voc, based on typical PV panel load curves. This may well not be the true MPPT point for a semi random power source and worst case may cause loading issues - but probably not.

Large range of typical solar regulators - Australia

MPPT controller with discussion - USA, CA.

BP GCR series learning controllers - may be too smart in this role?

Lead acid charging tutorial bulk, absorption and float ...

A question about electrons, charges and current

Let's talk about DC, a very simple circuit: a light bulb and a battery.

Some authors say that electrons move from negative to positive and current from positive from negative.

I always thought electrons moved in a wire at the light speed, but this video says that charges move very slow in a wire, about 5 centimeter per hour (2 inches per hour).

If electrons are charge carriers, is this video saying that electrons move at 5 cm/hour????

If electrons are that slow how can circuits work?

The video says that electric fields move at light speed.

So, I am not understanding anything.

I aways thought the whole magic were dome by electrons...

What is the correct explanation for this?

Charges, electrons and current?

Is the effect similar to a newton cradle, where one ball knocks the first one and the force is transmitted through the chain?

Answer

In a metallic wire, electricity propagates as a field, effectively. Electrons move quickly and literally bump into other atoms which (usually) dislodges another electron. This continues down the conductor so the effects of electrical current are seen very quickly.

This is not how electric currents propagate in a superconductor, though.

In that sense, the velocity of electrical propagation is very fast (in a wire it is typically about 63% of the speed of light for reasons I won't go into here. It is known as the velocity factor).

Electric fields (or more accurately electromagnetic fields) propagate at the speed of light in free space.

Any given electron does not travel very far in each of these short hops, but they do move, and a specific electron will move quite slowly. This is known as drift velocity.

tutorial - How can I reverse engineer a simple through-hole board?

How can I reverse engineer a simple through-hole board? Trying to do it by eye gets confusing because it's easy to lose track of component orientation and location while flipping the board over. Maybe there's a computer assisted technique that would make things easier?

Book recommendations for digital circuit design?

not sure if "digital circuit design" is exactly what I'm aiming for, but someone can tell me and I'll edit it if another name matches better.

Basically, circuit design interest me a lot. I like the idea of working with AND OR NOT etc gates and building things with them. I've been wanting to build a CPU for quite a few years now, but I lack the knowledge. I'm fairly decent at programming however, so I can think "logically", but with circuit design it all is very difficult for me to understand past simple adders and such.

So, I'm looking for a beginner's book on the subject. I plan on doing all design and testing in a simulator such as Logisim, but being shown how to actually put circuits together on a breadboard out of gates(or even transistors and such) would be a definite plus, but I wouldn't want for that to be the focus of it all.

My end result hopefully is to build a CPU in a simulator. So, tell me what book(s) I need to buy to get there for someone who is a novice at electronics and a decent computer programmer.

Answer

You might find it interesting to look at the open courseware site for the MIT 6.004 lecture/lab course. Look at both the lecture slides and the labs.

http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-004-computation-structures-spring-2009/

I'm not familiar with the content of the 2009 version (having taken it back when it was breadboards & modules) but later used the 2004? OCW version (java iirc simulation) as a reference, then implemented that processor architecture in verilog and subsequently in an FPGA kit.

ldo - High frequency noise filtering in audio

I power a DAC from SMPS. After the SMPS I use a LDO

My problem is that most LDOs only have a good PSSR around 100Khz or lower, while my SMPS has a switching frequency of about 1Mhz (thus noise)

1Mhz noise is not in the audio band....but my question is should I use a low pass filter (lpf) before the LDO to filter that high frequency noise ? IS it possible to have high frequency noise pollute the audio-band ?

Answer

Not only can HF noise influence your signal, it will influence your signal.

Only if a signal is phase locked to another will they have no dynamic influence on each other. Since your SMPS will create either one fixed frequency, or at the very least one completely unrelated to the audio you are making (Fun idea to try and lock them maybe, but utterly infeasible), there will always be interference from that noise into the samples generated.

It is also why good, medium-high to high resolution mixed signal designs include completely separated digital and analogue power systems.

If you have a HF transient on the analogue power right between (sensitive) samples, such as made by an SMPS at 1MHz, or by a digital parallel (or serial) bus, the difference in the samples will jump up or down a bit. By how much would greatly depend on your DAC. Having any of those transients on the analogue reference voltage will most certainly have a sample-to-sample influence!

This HF noise may not propagate fully or "as-is" through your analogue system, but it will most certainly have an effect on the audio output if it has any remaining significance to it.

1/1000th on the power rail, or 1/10000th on the analogue reference should be your absolute maximum, in my opinion, but in all fairness that's just a touchy-feely judgement call from someone not specifically an audio engineer. So that may be off by a decade if you talk to an actual audio pro, just don't get caught into Audiophoolery trying to make noise μV per kV or some such.

As for filtering, that can be easy enough:

^{simulate this circuit – Schematic created using CircuitLab}

Here I chose to use a coupled inductor, because the total inductance for a noise signal through the coupled conductor will be much higher for smaller/cheaper inductors. You could add a chip-bead in series with it to eliminate very high frequency noise to a higher degree. You can also include a chip-bead with an extra 100nF to 1μF at each chip/device/stage that uses the power to also isolate any digital noise picked up in DACs and such, but in an audio system that's often going well and truly over-board.

The values in this schematic are a quick back-of-head estimate based on a simplicifation of the real part of the "resistance" each element adds to the system. You can go into transfer functions, but I used a 50μH total coupled inductance for the coil and came to:

Z(C) = 1 / (jwC), means for a quick estimation the apparent resistance for a capacitor will come close to: "R(C)" = 1 / (2*pi* C). Deeper theories apply, but that would make this answer take several hours I don't have right now.

Z(L) = jwL, comes to: "R(L)" = 2*pi* L.

Which gives:

C1 will present as nearly equivalent to a 0.72 Ohm resistance at 10kHz.

C2 will present as nearly equivalent to a 0.16 Ohm resistance at 10kHz.
A coupled (or single) inductance of total effective 50uH will present as nearly equivalent to a 3.1 Ohm resistance at 10kHz.

This means that a 10kHz signal will be attenuated by about a factor of 20 by the inductance + C2 stage alone. Basically C1 is just there to give the high frequency components close to the filter somewhere to go, but as you can see with a 0.5Ohm resistance in cables and such, it already helps to filter noise. A factor 20 in voltage would, if I am not mistaken, be equivalent to -26dB. At higher frequencies this will quickly snow-ball into -70dB or better.

For well chosen parts, up to several MHz, the resistance in the capacitors will be divided by each multiplication in frequency. So 0.072 Ohm for 100kHz for C1, etc. Whereas the "apparent resistance" of the inductance will multiply, so 31 Ohm for 100kHz, etc.

It is important to realise though, that at these low apparent resistances the ESR/DC-resistance of the components has a real influence. If the capacitors have 5 Ohm ESR, then the filtering will be severely limited, so you may want to make the 100uF capacitance a small group of smaller caps. Possibly including a couple of 1uF/100nF ceramics to really get the sting out of MHz level noise. Also take note that long winding wires or traces to the capactiors from the power will increase resistance and wire inductance, to again limit the filtering capability.

Of course, the 3dB point and the total suppression at frequency X or Y will be much better represented when using proper filter maths, but it's my work day and writing that all up would take too much time, where this comes close enough. Look up LC filtering tutorials or Q&A's for deeper details into the proper maths.

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If you have a separate digital system that can be powered independantly from the analogue supply, it is best to "tap" that supply from the raw and noisy supply and filter it independantly. One reason is that the digital system will need much less filtering. Another reason is that then the digital transients on power will by separated from the analogue power by 2 independent L-C-filters.

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Although you can see that having a simple 50Hz/60Hz transformer that already acts as a huge filtering coil to AC-transients makes filtering a very simple matter of 0.2 Ohm wire resistance and 10mF of capacitance to basically get no-noise. One of the reasons SMPS's have not been used in audio systems for so long. "Tried and true" argument.

feedback - Confusion: Lock range of PLL

Suppose we have a type-I PLL whose block diagram is shown below: Here \$k_{pd}\$ is the average gain of the phase detector producing the control voltage \$V_c\$ which is input to the Voltage Controlled oscillator (VCO). In the feedback path we have a frequency divider which divides its input frequency by N.

Suppose input frequency is given by \$\omega_{ref} (=2\pi*f_{ref})\$ and output frequency is \$\omega_{out}\$, then in general the phase difference between the input and the fed-back frequency is given by: \$(\omega_{ref} - \omega_{out}/N)t + \Phi_{ref} - \Phi_{out}/N\$.This error signal is input to the phase detector. The steady state phase difference should be given by: \$\Phi_{ref} - \Phi_{out}\$ with \$\omega_{ref} = \omega_{out}/N\$. Does, this frequency relationship hold true even if \$ |\Phi_{ref} - \Phi_{out}| \ge 2\pi\$, which is beyond the range where the PLL will get locked?
In other words, does the frequency relationship between input and output (\$\omega_{ref} = \omega_{out}/N\$) maintained even if the PLL doesn't get locked? If not, what happens to the output signal (in steady state) if PLL is beyond the lock range (given by \$ |\Phi_{ref} - \Phi_{out}| \ge 2\pi\$)?

Answer

If input frequency and feedback frequency (after dividing) are the same then the PLL is potentially going to fall into a state of in-lock because the phase detector doesn't care about phase differences that are multiples of 2\$\pi\$: -

As the "wandering" clock leaves perfect phase alignment with the static clock (left side), the EXOR output starts to produce thin pulses that become wider as the the wandering clock leads the static clock by greater amounts. At perfect anti-phase between the two clocks the EXOR output is a constant "1" and as the leading extends even more, the EXOR output repeats itself as the phase difference between wandering clock and static clock is 2\$\pi\$ (right side).

digital logic - 4-bit adder carry confusion

I try to design a circuit that adds two 4-bit binary numbers, but I get confused about the carry thingy.

Above I add 0100 + 0101. The result should be 1001, but it shows 1100. buzzer

Later I did the 0110 + 1001 and it got it right (1111).

Then I tried 0111 + 0010 and I got 11010. buzzer

Is it the Half Adder fault?

Did I falsely connect each carry to the "CIN"s?

What's wrong?

Answer

Your switches are arranged LSb to MSb, but you're inputting the numbers MSb to LSb. Your schematic shows 0b0010 + 0b1010, with a correct result of 0b1100.

switch mode power supply - Confused about polarity of Transformer

I am confused about the Transformer dot polarity. I got design from ST's edesign Suite. Here is schematic for that :-

Now I need to order the design for transformer and the transformer design centre asking for dot polarity/Start-End point of pins. According to circuit, there are only 4 pins used on AC side and 2 pins on DC Side. The ST recommends EE-10 size Bobbin. Here is layout for that :-

What does 2 Pin in above figure donates? Is it start point or end point? Where to connect this pin in circuit?

I only need 6 pins for my circuit, but the layout for Transformer shows 10 Pins. I am also confused about the polarity.

The Transformer specs :-

Design Specs :-

current - Sizing a trace on a PCB to carry 2.5 amps

I need a trace on my PCB to carry up to 2.5 amps (average) current, with 5-6 amp spikes (it's going to a switch mode power supply.) How wide should the traces be? I've got a trade off between reliability and size, as the product is space constrained. Any tips would be appreciated.

Answer

After doing a quick google of "PCB Current Calculator", I found a PCB Current Calculator based on IPC-2152. It bases the width of the track on how much of a temperature rise the trace is allowed to have. It's nice in that it shows how much power you waste through your trace. I would design for your worst-case RMS current, since it's going to be a periodic signal.

If you use 2 oz/ft² copper instead of the standard 1 oz/ft² copper, you won't need as wide of a trace to achieve the same resistance. For example, allowing for a 10 ^oC rise, you can get away with these numbers at 3 A with no copper plane nearby:

• 177 mil (4.50 mm) on ¹/₂ oz/ft² copper


• 89 mil (2.26 mm) on 1 oz/ft² (35µm) copper


• 47 mil (1.19 mm) on 2 oz/ft² (70µm) copper

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Note: IPC-2221 (The standard used in the original answer) uses old measured values for its design charts, and these charts are implemented in many calculators. As best as I can tell, this data was claimed to be 50 years old, which makes IPC-ML-910 (1968) a possible source. As @AlcubierreDrive pointed out, a new standard, IPC-2152, contains new measured data, and presumably is more accurate. More importantly, a comparison of IPC-2221 values gives the following result for trace widths: IPC-2221 (internal) > IPC-2152 > IPC-2221 (external). Actual numbers for the example above (1oz copper) are

IPC-2152:             89 mil 
IPC-2221 (internal): 143 mil (+60%)
IPC-2221 (external):  55 mil (-38%)

Also note that the original numbers in this answer were based on the IPC-2221 internal calculations, which will provide a conservative estimate for all values.

Connecting power supplies in series

I need to draw approx 4 amps for 10-15 hours at a minimum of 18V.

I have hooked up two 300 watt power supplies in series:

• +12V on one and +5V on the other: the output is only +15.8V rather than the 17 point something that I was expecting


• +12V from each: then one power supply shuts down.

Why does this happen and how can I get the +18V (or more) that I am after?

arduino - What parts do I need in order to connect a light to my netduino?

I'm software engineer trying to get a little electronics project working. I have a netduino plus. I want to hook up a huge light like this and make it turn on and off. Where do I start? What would it take to make this happen? I'm not worried about the programming side I'm just curious what components I would need to get going. I'm a total noob so be nice. Thanks in advance.

Answer

On the manufacturer's site it says that it's AC operated, so you'll need a switch for that because the Netduino neither can stand the 120V nor can it supply the power needed.
Basically there are two ways to this: the electromechanical relay and the triac, which is an electronic switch to switch AC power.

Relay

The relay will still need more power than the Netduino will provide, so you'll need a transistor to provide the required current. The basic schematic is this:

The transistor will let a larger current flow through the relay's coil if a smaller current enters the base (the input from your Netduino). The 12V is the relay's rated coil voltage. Select an approriate relay if your Netduino's power supply gives a different voltage. The contacts need to be able to switch 120V AC, most probably at a relative low current. A 5A relay will do.
The transistor can be any small-signal NPN transistor, like the BC547. The diode can be a 1N4148.

Triac
This solution is all electronic, so no moving parts. It requires a few more parts than the relay.

The NAND gate on the left can be left out; it just shows that the MOC3041 is driven from a logic level.

Which to choose Since you're new to electronics the second schematic may look even more daunting than the first one, so I would go for the relay to start with, though I like the triac solution better.

soldering - What makes a solder joint dull?

When a solder joint is reheated without applying flux, the solder might get dull. Or, when I solder a joint (maybe with the temperature set higher than enough), the solder looks shiny when melted, then turns dull upon solidifying. The solder joint might still have good electrical connection, but I just wonder what makes the joint not shiny.

Answer

What you are seeing is a change in surface texture. This occurs when the solder transitions from liquid to solid. In the process, the solder forms into lots and lots of tiny grains, and the surface becomes rougher than it was as a liquid. This surface roughness reflects light in all directions, and the result is a surface which is not dark (since ambient light is also diffused) but which looks dull. These grains are not crystals as such, but rather occur due to impurities in the solder, which form dislocations which prevent the solder from forming into a single crystal in the process of solidifyng. In general, this occurs in any impure substance which is cooled below its melting point quickly. If you were to take extremely pure solder, melt it into a vacuum to prevent surface oxidation, and then cool it very slowly, you could produce a material with a very smooth surface and high reflectivity. It wouldn't be a perfect surface, since solder doesn't have a defined crystal structure, but the grain size would be much larger.

Impedance for Helmholtz Coil Connected to Audio Amplifier

I am trying to design a Helmholtz coil, that will have an impedance of about 2 ohms (the reason for this being that I am going to hook it up to a audio power amplifier, so to get the same wattage delivered I'm modeling it like a speaker that is 2 ohms)

If it helps thinking of using this amplifier.

First let me detail my set up:

Function Generator -> Power Amplifier -> Helmholtz Coil

I'm trying to generalize this as much as possible, so going to try and talk about it conceptually, is the best way to control the impedance in the coil is to set up an RL circuit, where I have a variable resistor so I can adjust it in turn with the impedance? And should I do the RL circuit in parallel or series?

usb - How to find out whether serial standard is RS232 or TTL when stated as "serial(RS232/TTL)"

I am recently moving from C programming into automation engineering. I have learned about RS232 and TTL standards, and I understand that they are based on the same concept of serial communication, however TTL uses logic voltages (3.3 V or 5.0 V) to be compatible with microcontrollers, while RS232 uses higher voltages for historic reasons (signal-to-noise-enhancement).

To start connecting to the "real world", I planned on using a simple printer to start practicing sending bits via the COM-Port. Here is a link to an example: https://de.aliexpress.com/item/JP-QR203-58mm-Micro-Receipt-Thermal-Printer-RS232-TTL-USB-Panel-Compatible-with-EML203/32693670343.html

This device seems suitable for my needs, however, some questions remain, as I am very eager to learn, but still a newbie in electrical engineering:

The interface is stated as "Serial (RS-232,TTL)" - Is there any way to find out which standard is implemented on the PCB exactly, RS232 or TTL?

Another suitable device seems to be this one here: https://www.amazon.de/WELQUIC-Thermodrucker-Bondrucker-Bluetooth-Standard-Art-1/dp/B075GG7VJT/ref=sr_1_2?ie=UTF8&qid=1533543476&sr=8-2&keywords=welquic+printer

1. 
   
   

   Again, how can I figure out whether RS232 or TTL is implemented?

   
   


2. 
   

   This device seems to feature a Mini-USB port for USB-communication and another Mini-USB port for RS-232/TTL communication... Which cables would be needed? Is there something like a serial/Mini-USB adapter cable? As I understand, USB standard has to be converted to RS232 or TTL - So my second question basically is, how can there be a port in Mini-USB-format for RS232/TTL?

   
   

Source vs Drain polarity for MOSFETS

When using MOSTEFS as a switch I always see the drain connected to the higher potential and and the load and the Source is always connected to ground. Can you switch those so that the Source pin connects to the higher potential and the drain is connected to ground?

stm32f4 - FSMC on STM32F407VGT6

I would like to know the maximum size of an external SRAM supported on STM32F407VGT6 via FMSC. Is it related to addresses?

---

According to the datasheet and the picture .. Is That mean that I can interface an external SRAM of 256 MB and a NAND Flash of 512 MB as a maximum size ?

wave - Sine Oscillator - for audio frequency

I'm looking to create several sine waves on a single circuit. All must be under 20Khz frequency and each must be unique. Mostly it will be 5-10 frequencies needed.

As I found - almost all crystal oscillator are in Mhz frequencies and only one kind is 32Khz (which is still too high).

I should be able to get this wave on the other side using FFT.

Ideas? :)

Thanks

Answer

You could easilly divide the 32KHz crystal frequency with a Binary Counter (such as the 4040) to give 16KHz, 8KHz, 4KHz, 2KHz, 1KHz, 500Hz, etc...

Then some clever filtering can create a sine(ish) wave from each of those square waves.

Calculating input impedance of 3 port network

I am trying to derive a expression for calculating the input impedance of a 3 port network to use as direct calculating code and avoid SPICE/simulator solving of the same.

I am able to solve the input impedance of a 2 port system with a load, \$Z_{load}\$, connected to port 2. The impedance looking into port 1 would be (by solving basic 2 port theory):

$$ Z_{in} = Z_{11} - \frac{Z_{21}Z_{12}}{Z_{22}+Z_{load}} $$

If I have a 3 port network with 2 ports connected to different loads, \$Z_{load1}\$ and \$Z_{load2}\$, how can I generate an expression for \$Z_{in}\$ looking in from port 1 starting from only the Z-matrix, \$Z_{load1}\$ and \$Z_{load2}\$?

Answer

The 3-port can be described in 3 equations, using

$$\left(\begin{matrix} V_1 \\ V_2 \\ V_3 \end{matrix}\right) = \left(\begin{matrix} Z_{11} & Z_{12} & Z_{13} \\ Z_{21} & Z_{22} & Z_{23} \\ Z_{31} & Z_{32} & Z_{33} \end{matrix}\right)\left(\begin{matrix} I_1 \\ I_2 \\ I_3\end{matrix}\right)$$

I will now load ports 1 and 2, while using port 3 as the input. Adding two loads adds two new equations

$$\begin{align} V_1 &= -Z_{L1}\cdot I_1 \\ V_2 &= -Z_{L2}\cdot I_2 \end{align}$$

This can be inserted into the matrix notation:

$$\left(\begin{matrix} Z_{11} & Z_{12} & Z_{13} \\ Z_{21} & Z_{22} & Z_{23} \\ Z_{31} & Z_{32} & Z_{33} \end{matrix}\right)\left(\begin{matrix} I_1 \\ I_2 \\ I_3\end{matrix}\right) = \left(\begin{matrix} -Z_{L1}\cdot I_1 \\ -Z_{L2}\cdot I_2 \\ V_3 \end{matrix}\right)$$

Which is the same as

$$\left(\begin{matrix} Z_{11} + Z_{L1} & Z_{12} & Z_{13} \\ Z_{21} & Z_{22} + Z_{L2} & Z_{23} \\ Z_{31} & Z_{32} & Z_{33} \end{matrix}\right)\left(\begin{matrix} I_1 \\ I_2 \\ I_3\end{matrix}\right) = \left(\begin{matrix} 0 \\ 0 \\ V_3 \end{matrix}\right)$$

Since we want to solve for \$Z_{in} = \frac{V_3}{I_3}\$, we can use Cramer's rule to find

$$ I_3 = \frac{\left|\begin{matrix} Z_{11} + Z_{L1} & Z_{12} & 0 \\ Z_{21} & Z_{22} + Z_{L_2} & 0 \\ Z_{31} & Z_{32} & V_3 \end{matrix}\right|}{\left|\begin{matrix} Z_{11} + Z_{L1} & Z_{12} & Z_{13} \\ Z_{21} & Z_{22} + Z_{L2} & Z_{23} \\ Z_{31} & Z_{32} & Z_{33} \end{matrix}\right|}\ $$

Or also

$$ Z_{in} = \frac{V_3}{I_3} = \frac{\left|\begin{matrix} Z_{11} + Z_{L1} & Z_{12} & Z_{13} \\ Z_{21} & Z_{22} + Z_{L2} & Z_{23} \\ Z_{31} & Z_{32} & Z_{33} \end{matrix}\right|}{\left|\begin{matrix} Z_{11} + Z_{L1} & Z_{12} & 0 \\ Z_{21} & Z_{22} + Z_{L_2} & 0 \\ Z_{31} & Z_{32} & 1 \end{matrix}\right|} $$

programmer - FTDI chip (FT2232D) malfunction

I'd designed a USB-JTAG Programmer with FT2232D. I programmed Xilinx spartan3 FPGA 2 times yesterday and everything was perfect. But today when I connect it to my laptop I see the following message: "USB device not recognized"

I saw a post about same problem: "If enumeration is failing, something in the hardware is broken. This could be a damaged chip (make sure you always power the chip completely , so don't let VCCIO be unpowered if you power VCC)."

I've connected the VCCIO of the FT2232D to the VCC of the FPGA board with a jumper, so when the FPGA board is off VCCIO can be unpowered.

Can anyone tell me wheather my chip is damaged or not? Or how I can check it?

Here is my board's schematic:

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Note: My laptop has windows XP SP3 media center edition, I've also tested it on win7 64bit but it didn't work.

Answer

Finally the problem has solved.

I cleaned the board with board cleaner again and reinstalled the driver.

communication - Time limited and band limited signal

How can a time limited signal be of infinite bandwidth and a finite bandwidth signal be of infinite duration?

Answer

Hint: what's the Fourier transform of a square pulse... also, something about duality and composition might help

cmrr - Why is noise is considered to be a "Common Mode Signal"?

I learnt that the magnetic interference due to the Earth causes noise in the cable but I wonder why this is considered to be a 'Common Mode Signal' and why differential amplifiers are used to eliminate it?

Answer

Firstly, this picture below hopefully explains why a differential signalling receiver will cancel out interference (or noise) on both wires: -

It's a simple case of A minus B i.e. the noise/interference gets cancelled but the wanted signal gets left intact.

Secondly, when an interference source is some distance away from the two-wire cable, it largely inflicts noise equally onto both conductors hence the noise is called "common-mode". When a noise source is much closer to one wire than the other there will be a noticibly differential noise signal and this isn't so easily dealt with by a receiving differential amplifier.

So, you have common-mode noise and differential noise and to make the incident noise only (mainly) have common-mode effects you need to do several of the things below: -

• Use matched impedances to ground so that any influence from noise sees equal impedances to ground thus, one wire does not naturally receive a larger noise signal than the other.


• Keep the noise source as far from the cable as possible


• Use differentail signalling to improve signal level amplitude (reduce SNR)



• Use twisted pair so that magnetic noise induces the same voltage on both wires. This also helps a bit with electric field interference.


• Use a screen so that electric fields couple to the screen and, due to internal capacitances, couple equally to both wires.


• Use a receiver that can deal linearly with signal and superimposed noise (transformers are good for this).

Voltage regulator minimum input voltage

I have a L78S05V voltage regulator (5V output). The datasheet's maximum ratings suggest the maximum input voltage (35V). I would like to know, is there a minimum input voltage?

I have a circuit that is powered from a 5V power supply. For "forward compatibility" (i.e. if my custom power supply broke) I want to add 5V voltage regulators on the input stage, so I can change the power supply with a 12V one and still have everything powered at 5V. I can add some jumpers to route the 5V input or 12V input (via voltage regulators), but if the 5V voltage regulator works well with a 5V input I can get rid of the jumpers and work with any input voltage between 5V ad 35V without worrying.

Thanks!

Answer

On a linear regulator you can not work with the same voltage at input and output. Basically inside the component there are transitors that are not perfect transistors, because they have a resistance when the current flow through them, and this resistance leads to a loss of voltage in the component. It is called the drop out voltage.

The maximum output voltage you can have with a given component and a given input voltage is : Vout = Vin - Vdropout.

In your datasheet it is wierdly written since Vin is refered at the drop out voltage. The datasheet say the min Vi is 8V, meaning the drop out voltage is actually 3V. Meaning if you put 5V at the input you won't have more than 2V at the output. Then you have to use your jumpers.

current - Reasons for a voltage follower introducing voltage gain?

I'm using a 3130 op-amp as a voltage follower (unity gain buffer amplifier). However it is introducing voltage gain.

It is wired the following way:

This is then just fed into a simple low pass RC circuit (R= 2k-10kΩ, C=0.5 μF).

With +Vcc @ +12V and -Vcc @ -12V, I get the following:

Vin ~ -0.4 VDC, Vout ~ 8 VDC

With +Vcc @ +5V and -Vcc @ -5V, I get the following:

Vin ~ -0.4 VDC, Vout ~ 3 VDC

What can cause voltage gain when using an op-amp as a voltage follower?

------------Edit 17-7-15---------------------

I tried a 741 op amp wired the same as above which is unity gain stable and I am still noticing a small voltage gain when supply voltage is +/-5V. input is -0.41V and output is +1.04V. However when supply voltage is +/- 12V there is no voltage gain. I dont see how this can occur, as the 741 op amp is supposed to be unity gain stable.

Answer

The amplifier CA3130 is NOT unity gain stable. That means: For 100% feedback the unit will oscillate - mostly with amplitudes reachning the power rails. Follow the data sheet recommendations and use a compensation capacitor (>47 pF).

operational amplifier - Utilizing a signal in the needed form to drive a load

At the output of an LM741 opAmp I have 16Vpp sine wave @ no load. I want to use this sine wave on an 8 ohms load with 1.5W power . Therefore I need 3.5 Vrms and 0.43 Arms on the load. Now, if I directly connect the load to the output of the opAmp, the voltage on the load drops to 0 immediately, and I assume this results from the fact that max current output of opAmp is around 20mA so it is not enough obviously.

Also I want to be able to adjust the power on the speaker, i.e the amplitude of the incoming sine wave.

So, what is the best method to drive that load with adjustable levels of output voltage? I would appreciate if anyone supplies an answer not involving buy this regulator or buy this converter etc. (***)Rather I prefer things like building a transistor amplifier circuit etc. Anyway, I am also open to other advices.

*** : actually, I have to design all these steps for a project. That's why I ask the fundamental methods. I know how silly it seems not using a commercial IC. By the way, the output of the 741 is the direct source of the sine wave. It is a sine wave generator(wien bridge oscillator) actually. I wonder can I do the amplification part seperately from that 741 oscillator circuit.

p.s : don't think matters but the load is a speaker which will be driven at 1kHz.

Saving Arduino sensor data to a text file

How can I save data retrieved from a sensor to a text file on the computer?

transformer - Magnetic field strength and flux density from hysteresis curve

I am trying to measure the magnetic hysteresis curve of a toroidal nanocrystalline ferromagnetic transformer core made of Nanoperm (datasheet linked) using the following circuit. Each of the windings (primary on input side and secondary on measurement side) has 6 turns of 16 AWG magnet wire. The 1 micro-F capacitor on the output side is used because when the magnetic field saturates, the output current goes to zero. Thus, with just an RL circuit on the measurement side, the voltage drop across both the coil and the 5 kOhm resistor are zero during saturation. The capacitor essentially holds the saturation voltage until the polarity of the input is reversed.

I justified my method first intuitively and later confirmed that it more or less matched with the method shown here (section title: "Measuring arrangement with an analog oscilloscope"). The only difference is that rather than directly connecting the function generator to the primary coil and using an op-amp integrator circuit on the measurement side, I use an audio amplifier (not shown) to amplify the current of the function generator to approximately 5.3 A (= 2.1 V / 0.4 ohms) and use a passive integrator on the measurement side.

^{simulate this circuit – Schematic created using CircuitLab}

An image of the hysteresis curved as measured on my oscilloscope is shown below. VM1 is plotted on the horizontal axis, and VM2 is plotted on the vertical axis.

Based on this information, how can I calculate (Q1-1) the magnetic field strength (in A/m) applied to and (Q1-2) the magnetic flux density (in T) induced in the core up to and during saturation?

---

UPDATE (8/6/18, 4:00 a.m.): In response to comments by @glen_geek, I re-did my experiment and made two changes. My questions are in bold and are marked as (Q2-X).

First, I realized that it was a mistake to use a single-ended probe for VM1 (with the ground side placed at the node between the resistor and the coil on the transformer). The resistor has a resistance of 400 mOhms, and the coil has a resistance of 200 mOhms. When signal is passing through the coils, the impedance will increase further since \$Z = \sqrt{R^2 + (\omega L)^2}\$. By placing the ground side of the probe there, I was incorrectly grounding my signal where it should not have been. I was using a differential probe for VM2, but I only have one differential probe that plugs into my oscilloscope. However, I have a NIDAQ which can record up to 40 differential inputs, so I decided to use it to probe the voltages across R1 and C2 and stopped using the standalone oscilloscope.

Next, as suggested by @glen_geek, I increased the resistance of R2, first up to 10 kOhms and then up to 27 kOhms and 37 kOhms. (Q2-1) It is still unclear to me why we increase rather than decrease R2 because the cutoff frequency of the filter only gets smaller as we increase the resistance. If someone could clarify for me why this is helpful, I would appreciate it. (I understand that the higher the resistance, the lower the cutoff frequency; and the lower the cutoff frequency, the greater the window of integration since (1) the time constant gets larger and (2) a larger time constant implies a larger window over which the signal is smoothed, which is what is required for only lower frequencies to be passed. I'm just not sure why reducing the gain of the frequency of interest, which is much higher than the cutoffs tabulated below, is a good thing in this case.) (Q2-2) Furthermore, is it even reasonable to use any gain other than 1 unless we compensate for it when we calculate the field strength and/or flux density?

Based on the datasheets shown here (page 3) and here, I found that the manufacturers quantified the hysteresis at 50 Hz. To try and replicate their results, I decided to run my experiment at 50 Hz as well. I also decided to run it at 350 Hz and at 380 Hz, which is close to the 377 Hz I was using before. (@glen_geek, you mentioned in your comment that it was suspicious that \$\omega = 377\$. In fact, \$f\$ was \$377\$ Hz, not \$\omega\$, which is \$2\pi f = 2\pi(377) = 2368\$ rad/s.)

The table below summarizes the cutoff frequencies and gains for input frequencies of 350 and 50 Hz, which were used in these experiments:

The figures below summarize the results of twelve experiments: \$f = \{50, 350, 380\}\$ Hz \$\times\$ \$R_2 = \{5, 10, 27, 37\}\$ kOhms. Each figure contains four subplots: a hysteresis loop, a plot of the voltage across R1 and the voltage across C2 against time, another plot of the previous but zoomed in, and a plot of the Fourier transform of the voltage across C2.

Note that to make my hysteresis loop more comparable to those in the datasheets linked above, I converted the raw voltages measured by my probes to magnetic field strength H (units of A/m) and magnetic flux density (units of T) using equations given in the tutorial linked above: $$H \equiv \frac{V_R(t)\cdot N}{R\cdot l_c}$$ where \$V_R\$ is the voltage across the resistor, \$N=6\$ is the number of turns, \$R = 400 \mbox{m}\Omega\$ is the shunt resistor connected to the audio amplifier, and \$l_c = 10.03 \mbox{ cm}\$ is the magnetic path length given here; and $$B(t) \equiv \int_{0}^t{\frac{E(t)}{-N\cdot A_c} dt}$$ where \$E\$ is the electromotive force (EMF) induced in the secondary winding, \$N=6\$ is the number of turns, and \$A_c = 0.88 \mbox{ cm}^2\$ is the cross-sectional area of the core given here. The raw voltages are plotted in the second and third subplots of each figure.

The MATLAB code used to generate H and B from the measurements is shown below:

R = 0.4; % ohms
N = 6; % number of turns
LFe = 10.03E-2; % m
AFe = 8.8E-5; % m^2

H = (V(:, 1)/R)*N/LFe;
B = V(:, 2)/(AFe*N);

figure (1); clf; subplot(2, 2, 1); scatter(H, B, 'k.')

xlabel('Magnetic field strength - H (A/m)')
ylabel('Magnetic flux density - B (T)')

where V(:, 1) and V(:, 2) correspond to the most recent 100 ms of data acquired by the differential probes VM1 and VM2 in the circuit diagram above. I think V(:, 2) already accounts for the integration since it is the voltage across the capacitor on the measurement side, but (Q2-3) I may be missing a multiplication by time in my calculation for B since the units for B are Teslas, which expressed in more fundamental units are \$\frac{V\cdot s}{m^2}\$. It would be great if someone could confirm this / correct me.

The shape of my hysteresis loop looks nowhere that of the hysteresis loop given in either of the datasheets here (page 3) or here even though both report measuring the hysteresis at 50 Hz. (Q2-4) Does anyone why this is the case?

Furthermore, other than H for the 50 Hz input cases, both H and B are orders of magnitude off compared to the values reported in the two datasheets. (Q2-5) Is this something due to the way I'm calculating H and B or due to the circuitry itself? Does this have anything to do with the fact that the integrator has a gain of much less than 1 for the frequencies I'm looking at?

Finally, a question about the way the measurement is being performed: (Q2-6) is it a problem that the integrator on the measurement side is passive? I.e. does the EMF induced in the measurement coil need to be buffered before being fed into the integrator?

---

Update (8/6/18, 3:15 p.m.): I have divided my question into subquestions posted here (1), here (2), and here (3). Any help would be greatly appreciated.

Answer

I came across a similar question on ResearchGate and found the work done by Mubeen Haadi to be very helpful. Rather than taking a hardware approach to integrating the induced voltage, Haadi took a software approach. I tried Haadi's posted code with some simulated data, and it seemed to work, so I followed in Haadi's footsteps.

I first modified my circuit by placing VM2 directly across terminals of the secondary coil, as shown in the circuit diagram below.

^{simulate this circuit – Schematic created using CircuitLab}

The voltage induced in the secondary coil is what would have been integrated by the RC integrator (or op-amp integrator). Rather than integrating this voltage with hardware, I integrated the voltage in MATLAB using the cumtrapz function. MATLAB code to generate the hysteresis curve (including the integration) is given here:

% define parameters of setup
R = 400E-3; % ohms
N = 6; % number of turns
LFe = 10.03E-2; % magnetic path legnth, m
AFe = 8.8E-5; % cross-sectional area of core, m^2


% generate time points of integration
t_max = 3; % experiment duration
rate = 80E3; % Fs of AO and AI NIDAQ cards
t = linspace(0, t_max, rate*t_max)';

% meas is the signal recorded by the AI NIDAQ card
VM1 = meas(:, 1);
VM2 = meas(:, 2);


% integrate VM2 and scale it to get the magnetic flux density
dB = VM2/(N*AFe);
B = cumtrapz(t, dB);
B = B - mean(B); % to remove any DC bias

% calculate the current through the primary coil and scale it to get
% magnetic field strength
H = (VM1/R)*N/LFe;

% convert into appropriate units and plot

figure; plot(H*1000/100,B*1000);
xlim([-150 150]); ylim([-1300 1300])
xticks([-140:20:140]); yticks([-1200:200:1200])
grid on
xlabel('H [mA/cm]'); ylabel('B [mT]')

Calculations for H and B were performed according to the tutorial linked here, with the equations given in the update to my question above. (Another useful tutorial linked to me by @laptop2d in one of my subquestions is given here. It contains the same equations for H and B.) The image below shows the hysteresis curve:

This closely matches the curve given in the datasheet 1 (here on page 3) both in terms of appearance and order of magnitude of H and B and resembles the curve in datasheet 2 (here). The loop I measured saturates at about 1.1 T for a field strength of 100 mA/cm while the loop measured by the manufacturer seems to saturate at about 1.2 T for a field strength of 120 mA/cm according to the first datasheet and at 1.2 T for a field strength of 200 mA/cm according to the second datasheet.

I would attribute differences between my curve and the curves shown in the datasheets to differences in the core used by the manufacturer and/or the fact that I'm only using six turns each for the primary and secondary windings, but I'm not really sure. If there are other thoughts as to why there could be differences, I would appreciate the suggestions. Thank you all for your help and contributions.