Thursday, 28 June 2018

embedded - How long/big is an I2C acknowledge?


I'd like to know, how long/big should be an ACK from a slave to its master? I am communicating with a module using the I2C protocol. But the large blank space in the middle, is this an ACK from the slave to the master (µc) as expected?


Whole view enter image description here


Close-up left enter image description here



Close-up middle enter image description here


Close-up right enter image description here What I am doing in software as pseudo-code is:


setSlaveAddress(0x48)
sendData(0x55);

Answer



The slave device you are communicating with is stretching the clock, which is a feature of I2C. Not all devices implement clock stretching. Any device on the bus can stretch the clock, but generally clock stretching is used by slaves to throttle incoming data.


After an ACK bit, a slave might hold the clock low to indicate that it is not ready to receive more data. Because SDA and SCL are open drain, low logic is created by pulling the line low and high logic is created by not driving the line (the lines must have pull-up resistors). Therefore, the slave driving SCL low will take precedence over the master trying to let the line float high. The slave indicates that it is ready to take more data when it finally releases SCL.


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